nb/intel/i945: Put stage cache in TSEG
[coreboot.git] / src / arch / 
tree8457c737343d5572dec7fa40e83fc8f67c6ec780
drwxr-xr-x   ..
drwxr-xr-x - arm
drwxr-xr-x - arm64
drwxr-xr-x - mips
drwxr-xr-x - ppc64
drwxr-xr-x - riscv
drwxr-xr-x - x86