soc/intel/elkhartlake: Update HECI Control Status Register settings
[coreboot.git] / util / post / 
treefbacf05bac657c14e75ebd84763fd74850905a96
drwxr-xr-x   ..
-rw-r--r-- 5 .gitignore
-rw-r--r-- 46 Makefile
-rw-r--r-- 77 README
-rw-r--r-- 59 description.md
-rw-r--r-- 1581 post.c