soc/intel/elkhartlake: Update HECI Control Status Register settings
[coreboot.git] / util / board_status / 
tree0a78219e60b48c03e92a3f7e18376e0f5e6f36c9
drwxr-xr-x   ..
-rw-r--r-- 13 .gitignore
-rw-r--r-- 1833 README
-rwxr-xr-x 14055 board_status.sh
-rw-r--r-- 81 description.md
-rwxr-xr-x 5598 getrevision.sh
drwxr-xr-x - go
-rwxr-xr-x 2335 set_up_live_image.sh