soc/intel/alderlake: rename CONFIG_MAX_PCIE_CLOCKS to CONFIG_MAX_PCIE_CLOCK_SRC
[coreboot.git] / Documentation / vendorcode / 
treed34a2b5577168c928430629f5b31aa36d8a2f222
drwxr-xr-x   ..
drwxr-xr-x - cavium
drwxr-xr-x - eltan
-rw-r--r-- 178 index.md