soc/intel/tigerlake: Fix wrong operation region for CPU to PCH method
[coreboot.git] / 3rdparty / 
tree127c5383388fb77f0e66e3b043e1bbe403aedb79
drwxr-xr-x   ..
m--------- - amd_blobs
m--------- - arm-trusted-firmware
m--------- - blobs
m--------- - chromeec
m--------- - ffs
m--------- - fsp
m--------- - intel-microcode
m--------- - libgfxinit
m--------- - libhwbase
m--------- - opensbi
m--------- - vboot