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Bob: Update the memory ramid of bob
2016-11-30
Rizwan Qureshi
soc/intel/skylake: Use SendVrMbxCmd1 for FSP 2
.
0
Signed-off-by:
Rizwan Qureshi
<rizwan.qureshi@intel.com>
commit
|
commitdiff
|
tree
2016-11-09
Rizwan Qur
e
shi
soc/intel/sk
y
l
ak
e
: fix memory access beyond array bounds
Signed-off-by:
Rizwan Qureshi
<rizwan.qureshi@intel.com>
commit
|
commitdiff
|
tree
2016-09-19
Ri
z
wan Qur
e
shi
k
u
nimitsu:
Remove incorrect der
e
ferencing of
p
oin
t
er
Signed-off-by:
Rizwan Qureshi
<rizwan.qureshi@intel.com>
commit
|
commitdiff
|
tree
2016-09-14
Rizwa
n
Q
ureshi
ku
n
imitsu: Add F
S
P
2
.
0 support in roms
t
age
Signed-off-by:
Rizwan Qureshi
<rizwan.qureshi@intel.com>
commit
|
commitdiff
|
tree
2016-09-14
R
i
zwan Qureshi
dr
i
ver
/
intel/
f
s
p
2_0: Make FSP-M binary XIP
Signed-off-by:
Rizwan Qureshi
<rizwan.qureshi@intel.com>
commit
|
commitdiff
|
tree
2016-09-12
Rizwan Q
u
reshi
kunimitsu: Add initial FSP
2
.
0 support
Signed-off-by:
Rizwan Qureshi
<rizwan.qureshi@intel.com>
commit
|
commitdiff
|
tree
2016-09-12
R
i
zwan Qureshi
vend
o
rcode/skylake:
A
dd FSP
h
eader files without any
.
.
.
Signed-off-by:
Rizwan Qureshi
<rizwan.qureshi@intel.com>
commit
|
commitdiff
|
tree
2016-09-12
Rizwan Qureshi
arch/x86
:
Utilize additio
n
al MTRRs in postca
r
_
fr
a
m
e
_
add_mtrr
Signed-off-by:
Rizwan Qureshi
<rizwan.qureshi@intel.com>
commit
|
commitdiff
|
tree
2016-09-12
Rizwan
Qureshi
cpu/x86: Move fls()
and
f
m
s
(
)
to mtrr
.
h
Signed-off-by:
Rizwan Qureshi
<rizwan.qureshi@intel.com>
commit
|
commitdiff
|
tree
2016-09-12
Rizwan Qureshi
arch/x86:
Always
compile postca
r
librar
y
i
n rom
s
tage
Signed-off-by:
Rizwan Qureshi
<rizwan.qureshi@intel.com>
commit
|
commitdiff
|
tree
2016-09-02
Rizwan Qureshi
vendorcode
/
i
ntel: Add UDK
2015 Bindings
Signed-off-by:
Rizwan Qureshi
<rizwan.qureshi@intel.com>
commit
|
commitdiff
|
tree
2016-08-31
Rizwan
Qureshi
skylake:
Add i
n
itial FSP2
.
0 suppo
r
t
Signed-off-by:
Rizwan Qureshi
<rizwan.qureshi@intel.com>
commit
|
commitdiff
|
tree
2016-08-31
Rizwan Qur
e
s
hi
driver/intel/fsp2
.
0:
A
dd Exter
n
a
l
stage cache r
e
gion
.
.
.
Signed-off-by:
Rizwan Qureshi
<rizwan.qureshi@intel.com>
commit
|
commitdiff
|
tree
2016-08-18
Ri
z
wan Qureshi
soc/inte
l
/skyl
a
ke: C
o
r
rect Cache as
r
am size
Signed-off-by:
Rizwan Qureshi
<rizwan.qureshi@intel.com>
commit
|
commitdiff
|
tree
2016-08-18
Rizwa
n
Qu
r
eshi
skylake: Do F
s
pTempRa
m
In
i
t only
for FSP1
.
1 & tidy up
.
.
.
Signed-off-by:
Rizwan Qureshi
<rizwan.qureshi@intel.com>
commit
|
commitdiff
|
tree
2016-08-17
Rizwan Q
u
reshi
so
c
/
intel/skylake: restor
e
MCHBAR and
D
MIBAR programming
Signed-off-by:
Rizwan Qureshi
<rizwan.qureshi@intel.com>
commit
|
commitdiff
|
tree
2016-08-11
Rizwan Qureshi
vendorcode/int
e
l/fs
p
: Add fsp 2
.
0 head
e
r files for
.
.
.
Signed-off-by:
Rizwan Qureshi
<rizwan.qureshi@intel.com>
commit
|
commitdiff
|
tree
2016-08-06
Rizwan Qureshi
soc/intel/skylake: Add Ka
b
yla
k
e
d
evice Ids
Signed-off-by:
Rizwan Qureshi
<rizwan.qureshi@intel.com>
commit
|
commitdiff
|
tree
2016-03-12
Rizwan Quresh
i
glados/
c
h
e
ll: send a
n
extra VR mail
b
ox command
Original-Signed-off-by:
Rizwan Qureshi
<rizwan.qureshi@intel.com>
commit
|
commitdiff
|
tree
2016-03-12
Rizwan Qureshi
soc/int
e
l/sk
y
l
a
ke
:
add option t
o
e
n
able VR spec
i
f
ic
.
.
.
Original-Signed-off-by:
Rizwan Qureshi
<rizwan.qureshi@intel.com>
commit
|
commitdiff
|
tree
2016-01-19
Rizwa
n
Qureshi
intel/kunimitsu: Enable Fsp
S
kipM
p
Init token
Original-Signed-off-by:
Rizwan Qureshi
<rizwan.qureshi@intel.com>
commit
|
commitdiff
|
tree
2016-01-16
R
i
z
wan Qureshi
intel
/
k
unimitsu: rem
o
ve
/
disable Wake on l
a
n
Original-Commit-Ready:
Rizwan Qureshi
<rizwan.qureshi@intel.com>
Original-Tested-by:
Rizwan Qureshi
<rizwan.qureshi@intel.com>
commit
|
commitdiff
|
tree
2016-01-16
R
i
z
w
a
n
Qureshi
i
ntel/k
u
n
i
mitsu: Add VrConfi
g
UP
D
par
a
meters
Original-Signed-off-by:
Rizwan Qureshi
<rizwan.qureshi@intel.com>
commit
|
commitdiff
|
tree
2016-01-16
Rizwan Qu
r
eshi
intel/
s
ky
l
ak
e
: Ad
d
VrConfig UPD parameters from
c
o
reboo
t
Original-Signed-off-by:
Rizwan Qureshi
<rizwan.qureshi@intel.com>
commit
|
commitdiff
|
tree
2016-01-16
Riz
w
an Qureshi
intel/sk
y
lake: Enabl
e
SkipMpInit
toke
n
Original-Signed-off-by:
Rizwan Qureshi
<rizwan.qureshi@intel.com>
commit
|
commitdiff
|
tree
2016-01-15
Ri
z
wa
n
Qureshi
in
t
el/kunimitsu:
Add new configurat
i
on paramete
r
s
Original-Commit-Ready:
Rizwan Qureshi
<rizwan.qureshi@intel.com>
Original-Tested-by:
Rizwan Qureshi
<rizwan.qureshi@intel.com>
commit
|
commitdiff
|
tree
2016-01-15
Rizw
a
n
Q
u
reshi
intel/
s
kyla
k
e: More UPD params are added for PCH pol
i
cy
.
.
.
Original-Signed-off-by:
Rizwan Qureshi
<rizwan.qureshi@intel.com>
commit
|
commitdiff
|
tree
2015-11-05
Riz
w
a
n Qure
s
hi
skylake: Set Pk
g
Power clam
p
ing bit in Pow
e
r
Limit MSR
Original-Signed-off-by:
Rizwan Qureshi
<rizwan.qureshi@intel.com>
commit
|
commitdiff
|
tree
2015-10-27
Ri
z
wan
Q
u
r
e
s
hi
i
n
tel/kunim
i
tsu: USB Phy settin
g
s and Ski
p
U
ART2 init
.
.
.
Original-Signed-off-by:
Rizwan Qureshi
<rizwan.qureshi@intel.com>
commit
|
commitdiff
|
tree
2015-10-27
Rizwan Qur
e
shi
intel/sk
y
lake:
FSP 1
.
7
.
0
MemoryInit/Si
l
i
con
I
nit params
.
.
.
Original-Signed-off-by:
Rizwan Qureshi
<rizwan.qureshi@intel.com>
commit
|
commitdiff
|
tree
2015-08-19
Ri
z
wan Qur
e
shi
Skylake: update cbme
m
_t
o
p
Original-Signed-off-by:
Rizwan Qureshi
<rizwan.qureshi@intel.com>
Signed-off-by:
Rizwan Qureshi
<rizwan.qureshi@intel.com>
commit
|
commitdiff
|
tree
2015-08-19
Rizwan Qureshi
skylake:
Update
Mem
o
ry and
Si
l
i
con Init params
Original-Signed-off-by:
Rizwan Qureshi
<rizwan.qureshi@intel.com>
Signed-off-by:
Rizwan Qureshi
<rizwan.qureshi@intel.com>
commit
|
commitdiff
|
tree
2015-07-29
R
i
zwan Qu
r
eshi
s
k
y
lake:
U
pda
t
e mi
c
rocode reload i
n
ramstage
.
Original-Signed-off-by:
Rizwan Qureshi
<rizwan.qureshi@intel.com>
commit
|
commitdiff
|
tree
2015-07-29
Rizwan Qu
r
eshi
Ad
d
SoC speci
f
i
c
mic
r
ocode update chec
k
in ramstage
Original-Signed-off-by:
Rizwan Qureshi
<rizwan.qureshi@intel.com>
commit
|
commitdiff
|
tree
2015-07-29
Rizwan Qureshi
S
k
ylake: Fix microcode
r
e
load i
n
b
o
otblock
cpu init
Original-Signed-off-by:
Rizwan Qureshi
<rizwan.qureshi@intel.com>
commit
|
commitdiff
|
tree