skylake: Update Memory and Silicon Init params
commit5c1c3d69dd47e11bea2e3f61eeb17ed13e5a8e0d
authorRizwan Qureshi <rizwan.qureshi@intel.com>
Tue, 21 Jul 2015 14:51:50 +0000 (21 20:21 +0530)
committerAaron Durbin <adurbin@chromium.org>
Wed, 19 Aug 2015 14:04:27 +0000 (19 14:04 +0000)
treeb265fd225a96b25078015229329ac79c07f2d9b4
parentf1acb9b69d9fca1b5396e76f5d19781dce46d01b
skylake: Update Memory and Silicon Init params

Update the MemoryInit and SilicoInit params as per
FSP 1.3.0 release.

Note: add SvGv and Rmt to Upd.

BRANCH=None
BUG=None
TEST=Build and Boot FAB3 (Kunimitsu)
CQ-DEPEND=CL:*226035, CL:*226045

Original-Change-Id: I62000f6a485fee42ef733c3b548192f2bedfce49
Original-Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Original-Signed-off-by: Robbie Zhang <robbie.zhang@intel.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/291573
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Tested-by: Wenkai Du <wenkai.du@intel.com>
Change-Id: Iaafa658b4e710fe512526a521cf6c529efb19bf0
Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Signed-off-by: Robbie Zhang <robbie.zhang@intel.com>
Reviewed-on: http://review.coreboot.org/11238
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
src/soc/intel/skylake/chip.c
src/soc/intel/skylake/chip.h
src/soc/intel/skylake/romstage/romstage.c