| commit | f62c49474fd6739558e308df0603350dd73b516e | |
| author | Tim Wawrzynczak <twawrzynczak@chromium.org> | |
| Fri, 26 Feb 2021 17:30:52 +0000 (26 10:30 -0700) | ||
| committer | Nico Huber <nico.h@gmx.de> | |
| Tue, 27 Apr 2021 11:06:38 +0000 (27 11:06 +0000) | ||
| tree | 64ccdfddfcc57c0f6d01d9eb58d99f732b5b302e | treesnapshot (tar.gz zip) |
| parent | d26cdb3ea3019d76dd39cfcd8c46bd36e8860054 | commitdiff |
sb/intel/common: Refactor _PRT generation to support GSI-based tables
Newer Intel SoCs also support _PRT tables, but they route PCI devices to
more than just PIRQs, and statically specify IRQs instead of using link
devices. Extend/refactor intel_acpi_gen_def_acpi_pirq to support this
additional use case.
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Change-Id: Ica420a3d12fd1d64c8fe6e4b326fd779b3f10868
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50857
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Newer Intel SoCs also support _PRT tables, but they route PCI devices to
more than just PIRQs, and statically specify IRQs instead of using link
devices. Extend/refactor intel_acpi_gen_def_acpi_pirq to support this
additional use case.
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Change-Id: Ica420a3d12fd1d64c8fe6e4b326fd779b3f10868
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50857
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>