| commit | d9d711c7f5dda34cdad9f8ee73dc8fead86fc6eb | |
| author | Sridhar Siricilla <sridhar.siricilla@intel.com> | |
| Thu, 3 Dec 2020 21:02:21 +0000 (4 02:32 +0530) | ||
| committer | Furquan Shaikh <furquan@google.com> | |
| Mon, 14 Dec 2020 18:42:25 +0000 (14 18:42 +0000) | ||
| tree | b8138fcdc381c97cdc11498e070d782b6d2210d8 | treesnapshot (tar.gz zip) |
| parent | 551bd92b2b33fb71e74eb8d22db3aea69280a9b7 | commitdiff |
soc/intel/tigerlake: Enable CSE Lite driver for TGL platform in romstage
This patch sets up cse_fw_sync() call in the romstage. The cse_fw_sync()
must be called after DRAM initialization.
BUG=b:174694480
Test=Verified on Tigerlake platform
Signed-off-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Change-Id: Ib485a4d1d15989b162105deb32bb317d7a0f2856
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48281
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This patch sets up cse_fw_sync() call in the romstage. The cse_fw_sync()
must be called after DRAM initialization.
BUG=b:174694480
Test=Verified on Tigerlake platform
Signed-off-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Change-Id: Ib485a4d1d15989b162105deb32bb317d7a0f2856
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48281
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
| src/soc/intel/tigerlake/romstage/romstage.c | diffblobblamehistory |