| commit | 551bd92b2b33fb71e74eb8d22db3aea69280a9b7 | |
| author | Sridhar Siricilla <sridhar.siricilla@intel.com> | |
| Thu, 3 Dec 2020 20:54:31 +0000 (4 02:24 +0530) | ||
| committer | Furquan Shaikh <furquan@google.com> | |
| Mon, 14 Dec 2020 18:42:19 +0000 (14 18:42 +0000) | ||
| tree | da207596e6962fd3f8bd6c821da5dff923c30780 | treesnapshot (tar.gz zip) |
| parent | 1a2b70284895a9daef667aada307405039dc8cce | commitdiff |
soc/intel/jasperlake: Enables CSE Lite driver for JSL platform in the romstage
This patch sets up cse_fw_sync() call in the romstage.The cse_fw_sync()
must be called after DRAM initialization.
BUG=b:174694480
Test=Verified on Drawlet
Signed-off-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Change-Id: I43030e77f6ede53c23e6c9e65d34db85c141e13a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48280
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This patch sets up cse_fw_sync() call in the romstage.The cse_fw_sync()
must be called after DRAM initialization.
BUG=b:174694480
Test=Verified on Drawlet
Signed-off-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Change-Id: I43030e77f6ede53c23e6c9e65d34db85c141e13a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48280
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
| src/soc/intel/jasperlake/romstage/romstage.c | diffblobblamehistory |