| commit | 8e345d4ca2a13ebdf9edf1071d7c4f03d084d143 | |
| author | Aaron Durbin <adurbin@chromium.org> | |
| Tue, 15 Jan 2013 21:34:08 +0000 (15 15:34 -0600) | ||
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | |
| Mon, 18 Mar 2013 17:50:37 +0000 (18 18:50 +0100) | ||
| tree | 28712b91acfe7f1cccc840fa523e761c18d17c44 | treesnapshot (tar.gz zip) |
| parent | 18af4d23f6b17827dda50d17d8dc9da5b2656eef | commitdiff |
haswell: lapic timer support
Haswell's BCLK is fised at 100MHz like Sandy/Ivy. Add Haswell's model
to the switch statement.
Change-Id: Ib9e2afc04eba940bfcee92a6ee5402759b21cc45
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/2747
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Haswell's BCLK is fised at 100MHz like Sandy/Ivy. Add Haswell's model
to the switch statement.
Change-Id: Ib9e2afc04eba940bfcee92a6ee5402759b21cc45
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/2747
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
| src/cpu/x86/lapic/apic_timer.c | diffblobblamehistory |