| commit | 6be8a5138a193431d873c24f0b79e699d5b23eb6 | |
| author | Mario Scheithauer <mario.scheithauer@siemens.com> | |
| Tue, 25 May 2021 11:42:28 +0000 (25 13:42 +0200) | ||
| committer | Patrick Georgi <pgeorgi@google.com> | |
| Sun, 30 May 2021 20:16:56 +0000 (30 20:16 +0000) | ||
| tree | dd442a5303221575b65cee310b6f07a81133bd11 | treesnapshot (tar.gz zip) |
| parent | 0a88c6057a1357e8cb7ee0ab28b705336841073e | commitdiff |
mb/siemens/{mc_apl2,...,mc_apl6}: Do early UART pad configuration
With commit 405f229689 (soc/intel/*: drop UART pad configuration from
common code) the UART pad configuration was dropped from common SoC
code. Through a second commit 5ff17ed393 (mb/siemens/mc_apl1: do UART
pad configuration at board-level) the UART pad configuration was made
for mc_apl1 baseboard. This change is also needed for all other mc_apl
boards.
Change-Id: If78726d9b141e4e7580cca3267f49c1a5b95d7fa
Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54911
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
With commit 405f229689 (soc/intel/*: drop UART pad configuration from
common code) the UART pad configuration was dropped from common SoC
code. Through a second commit 5ff17ed393 (mb/siemens/mc_apl1: do UART
pad configuration at board-level) the UART pad configuration was made
for mc_apl1 baseboard. This change is also needed for all other mc_apl
boards.
Change-Id: If78726d9b141e4e7580cca3267f49c1a5b95d7fa
Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54911
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>