src/drivers/pc80/mc146818rtc.c

   1 #include <stdint.h>
   2 #include <build.h>
   3 #include <console/console.h>
   4 #include <pc80/mc146818rtc.h>
   5 #include <boot/coreboot_tables.h>
   6 #include <string.h>
   7 #if CONFIG_USE_OPTION_TABLE
   8 #include "option_table.h"
   9 #include <cbfs.h>
  10 #endif
  11
  12 /* control registers - Moto names
  13  */
  14 #define RTC_REG_A               10
  15 #define RTC_REG_B               11
  16 #define RTC_REG_C               12
  17 #define RTC_REG_D               13
  18
  19
  20 /**********************************************************************
  21  * register details
  22  **********************************************************************/
  23 #define RTC_FREQ_SELECT RTC_REG_A
  24
  25 /* update-in-progress  - set to "1" 244 microsecs before RTC goes off the bus,
  26  * reset after update (may take 1.984ms @ 32768Hz RefClock) is complete,
  27  * totalling to a max high interval of 2.228 ms.
  28  */
  29 # define RTC_UIP                0x80
  30 # define RTC_DIV_CTL            0x70
  31    /* divider control: refclock values 4.194 / 1.049 MHz / 32.768 kHz */
  32 #  define RTC_REF_CLCK_4MHZ     0x00
  33 #  define RTC_REF_CLCK_1MHZ     0x10
  34 #  define RTC_REF_CLCK_32KHZ    0x20
  35    /* 2 values for divider stage reset, others for "testing purposes only" */
  36 #  define RTC_DIV_RESET1        0x60
  37 #  define RTC_DIV_RESET2        0x70
  38   /* Periodic intr. / Square wave rate select. 0=none, 1=32.8kHz,... 15=2Hz */
  39 # define RTC_RATE_SELECT        0x0F
  40 #  define RTC_RATE_NONE         0x00
  41 #  define RTC_RATE_32786HZ      0x01
  42 #  define RTC_RATE_16384HZ      0x02
  43 #  define RTC_RATE_8192HZ       0x03
  44 #  define RTC_RATE_4096HZ       0x04
  45 #  define RTC_RATE_2048HZ       0x05
  46 #  define RTC_RATE_1024HZ       0x06
  47 #  define RTC_RATE_512HZ        0x07
  48 #  define RTC_RATE_256HZ        0x08
  49 #  define RTC_RATE_128HZ        0x09
  50 #  define RTC_RATE_64HZ         0x0a
  51 #  define RTC_RATE_32HZ         0x0b
  52 #  define RTC_RATE_16HZ         0x0c
  53 #  define RTC_RATE_8HZ          0x0d
  54 #  define RTC_RATE_4HZ          0x0e
  55 #  define RTC_RATE_2HZ          0x0f
  56
  57 /**********************************************************************/
  58 #define RTC_CONTROL     RTC_REG_B
  59 # define RTC_SET 0x80           /* disable updates for clock setting */
  60 # define RTC_PIE 0x40           /* periodic interrupt enable */
  61 # define RTC_AIE 0x20           /* alarm interrupt enable */
  62 # define RTC_UIE 0x10           /* update-finished interrupt enable */
  63 # define RTC_SQWE 0x08          /* enable square-wave output */
  64 # define RTC_DM_BINARY 0x04     /* all time/date values are BCD if clear */
  65 # define RTC_24H 0x02           /* 24 hour mode - else hours bit 7 means pm */
  66 # define RTC_DST_EN 0x01        /* auto switch DST - works f. USA only */
  67
  68 /**********************************************************************/
  69 #define RTC_INTR_FLAGS  RTC_REG_C
  70 /* caution - cleared by read */
  71 # define RTC_IRQF 0x80          /* any of the following 3 is active */
  72 # define RTC_PF 0x40
  73 # define RTC_AF 0x20
  74 # define RTC_UF 0x10
  75
  76 /**********************************************************************/
  77 #define RTC_VALID       RTC_REG_D
  78 # define RTC_VRT 0x80           /* valid RAM and time */
  79 /**********************************************************************/
  80
  81 static void rtc_update_cmos_date(u8 has_century)
  82 {
  83         /* Now setup a default date equals to the build date */
  84         cmos_write(0, RTC_CLK_SECOND);
  85         cmos_write(0, RTC_CLK_MINUTE);
  86         cmos_write(1, RTC_CLK_HOUR);
  87         cmos_write(COREBOOT_BUILD_WEEKDAY, RTC_CLK_DAYOFWEEK);
  88         cmos_write(COREBOOT_BUILD_DAY, RTC_CLK_DAYOFMONTH);
  89         cmos_write(COREBOOT_BUILD_MONTH, RTC_CLK_MINUTE);
  90         cmos_write(COREBOOT_BUILD_YEAR, RTC_CLK_YEAR);
  91         if (has_century) cmos_write(0x20, RTC_CLK_ALTCENTURY);
  92 }
  93
  94 #if CONFIG_USE_OPTION_TABLE
  95 static int rtc_checksum_valid(int range_start, int range_end, int cks_loc)
  96 {
  97         int i;
  98         u16 sum, old_sum;
  99         sum = 0;
 100         for(i = range_start; i <= range_end; i++) {
 101                 sum += cmos_read(i);
 102         }
 103         old_sum = ((cmos_read(cks_loc)<<8) | cmos_read(cks_loc+1))&0x0ffff;
 104         return sum == old_sum;
 105 }
 106
 107 static void rtc_set_checksum(int range_start, int range_end, int cks_loc)
 108 {
 109         int i;
 110         u16 sum;
 111         sum = 0;
 112         for(i = range_start; i <= range_end; i++) {
 113                 sum += cmos_read(i);
 114         }
 115         cmos_write(((sum >> 8) & 0x0ff), cks_loc);
 116         cmos_write(((sum >> 0) & 0x0ff), cks_loc+1);
 117 }
 118 #endif
 119
 120 #if CONFIG_ARCH_X86
 121 #define RTC_CONTROL_DEFAULT (RTC_24H)
 122 #define RTC_FREQ_SELECT_DEFAULT (RTC_REF_CLCK_32KHZ | RTC_RATE_1024HZ)
 123 #else
 124 #if CONFIG_ARCH_ALPHA
 125 #define RTC_CONTROL_DEFAULT (RTC_SQWE | RTC_24H)
 126 #define RTC_FREQ_SELECT_DEFAULT (RTC_REF_CLCK_32KHZ | RTC_RATE_1024HZ)
 127 #endif
 128 #endif
 129
 130 void rtc_init(int invalid)
 131 {
 132         int cmos_invalid = 0;
 133         int checksum_invalid = 0;
 134 #if CONFIG_USE_OPTION_TABLE
 135         unsigned char x;
 136 #endif
 137
 138         printk(BIOS_DEBUG, "RTC Init\n");
 139
 140 #if CONFIG_USE_OPTION_TABLE
 141         /* See if there has been a CMOS power problem. */
 142         x = cmos_read(RTC_VALID);
 143         cmos_invalid = !(x & RTC_VRT);
 144
 145         /* See if there is a CMOS checksum error */
 146         checksum_invalid = !rtc_checksum_valid(PC_CKS_RANGE_START,
 147                         PC_CKS_RANGE_END,PC_CKS_LOC);
 148
 149 #define CLEAR_CMOS 0
 150 #else
 151 #define CLEAR_CMOS 1
 152 #endif
 153
 154         if (invalid || cmos_invalid || checksum_invalid) {
 155 #if CLEAR_CMOS
 156                 int i;
 157
 158                 cmos_write(0, 0x01);
 159                 cmos_write(0, 0x03);
 160                 cmos_write(0, 0x05);
 161                 for(i = 10; i < 128; i++) {
 162                         cmos_write(0, i);
 163                 }
 164
 165                 if (cmos_invalid) {
 166                         rtc_update_cmos_date(RTC_HAS_NO_ALTCENTURY);
 167                 }
 168 #endif
 169                 printk(BIOS_WARNING, "RTC:%s%s%s%s\n",
 170                         invalid?" Clear requested":"",
 171                         cmos_invalid?" Power Problem":"",
 172                         checksum_invalid?" Checksum invalid":"",
 173                         CLEAR_CMOS?" zeroing cmos":"");
 174         }
 175
 176         /* Setup the real time clock */
 177         cmos_write(RTC_CONTROL_DEFAULT, RTC_CONTROL);
 178         /* Setup the frequency it operates at */
 179         cmos_write(RTC_FREQ_SELECT_DEFAULT, RTC_FREQ_SELECT);
 180         /* Ensure all reserved bits are 0 in register D */
 181         cmos_write(RTC_VRT, RTC_VALID);
 182
 183 #if CONFIG_USE_OPTION_TABLE
 184         /* See if there is a LB CMOS checksum error */
 185         checksum_invalid = !rtc_checksum_valid(LB_CKS_RANGE_START,
 186                         LB_CKS_RANGE_END,LB_CKS_LOC);
 187         if(checksum_invalid)
 188                 printk(BIOS_DEBUG, "RTC: coreboot checksum invalid\n");
 189
 190         /* Make certain we have a valid checksum */
 191         rtc_set_checksum(PC_CKS_RANGE_START,
 192                         PC_CKS_RANGE_END,PC_CKS_LOC);
 193 #endif
 194
 195         /* Clear any pending interrupts */
 196         (void) cmos_read(RTC_INTR_FLAGS);
 197 }
 198
 199
 200 #if CONFIG_USE_OPTION_TABLE
 201 /* This routine returns the value of the requested bits
 202         input bit = bit count from the beginning of the cmos image
 203               length = number of bits to include in the value
 204               ret = a character pointer to where the value is to be returned
 205         output the value placed in ret
 206               returns 0 = successful, -1 = an error occurred
 207 */
 208 static int get_cmos_value(unsigned long bit, unsigned long length, void *vret)
 209 {
 210         unsigned char *ret;
 211         unsigned long byte,byte_bit;
 212         unsigned long i;
 213         unsigned char uchar;
 214
 215         /* The table is checked when it is built to ensure all
 216                 values are valid. */
 217         ret = vret;
 218         byte=bit/8;     /* find the byte where the data starts */
 219         byte_bit=bit%8; /* find the bit in the byte where the data starts */
 220         if(length<9) {  /* one byte or less */
 221                 uchar = cmos_read(byte); /* load the byte */
 222                 uchar >>= byte_bit;     /* shift the bits to byte align */
 223                 /* clear unspecified bits */
 224                 ret[0] = uchar & ((1 << length) -1);
 225         }
 226         else {  /* more that one byte so transfer the whole bytes */
 227                 for(i=0;length;i++,length-=8,byte++) {
 228                         /* load the byte */
 229                         ret[i]=cmos_read(byte);
 230                 }
 231         }
 232         return 0;
 233 }
 234
 235 int get_option(void *dest, const char *name)
 236 {
 237         struct cmos_option_table *ct;
 238         struct cmos_entries *ce;
 239         size_t namelen;
 240         int found=0;
 241
 242         /* Figure out how long name is */
 243         namelen = strnlen(name, CMOS_MAX_NAME_LENGTH);
 244
 245         /* find the requested entry record */
 246         ct=cbfs_find_file("cmos_layout.bin", CBFS_COMPONENT_CMOS_LAYOUT);
 247         if (!ct) {
 248                 printk(BIOS_ERR, "RTC: cmos_layout.bin could not be found. "
 249                                                 "Options are disabled\n");
 250                 return(-2);
 251         }
 252         ce=(struct cmos_entries*)((unsigned char *)ct + ct->header_length);
 253         for(;ce->tag==LB_TAG_OPTION;
 254                 ce=(struct cmos_entries*)((unsigned char *)ce + ce->size)) {
 255                 if (memcmp(ce->name, name, namelen) == 0) {
 256                         found=1;
 257                         break;
 258                 }
 259         }
 260         if(!found) {
 261                 printk(BIOS_DEBUG, "WARNING: No CMOS option '%s'.\n", name);
 262                 return(-2);
 263         }
 264
 265         if(get_cmos_value(ce->bit, ce->length, dest))
 266                 return(-3);
 267         if(!rtc_checksum_valid(LB_CKS_RANGE_START,
 268                         LB_CKS_RANGE_END,LB_CKS_LOC))
 269                 return(-4);
 270         return(0);
 271 }
 272
 273 static int set_cmos_value(unsigned long bit, unsigned long length, void *vret)
 274 {
 275         unsigned char *ret;
 276         unsigned long byte,byte_bit;
 277         unsigned long i;
 278         unsigned char uchar, mask;
 279         unsigned int chksum_update_needed = 0;
 280
 281         ret = vret;
 282         byte = bit / 8;                 /* find the byte where the data starts */
 283         byte_bit = bit % 8;             /* find the bit in the byte where the data starts */
 284         if(length <= 8) {               /* one byte or less */
 285                 mask = (1 << length) - 1;
 286                 mask <<= byte_bit;
 287
 288                 uchar = cmos_read(byte);
 289                 uchar &= ~mask;
 290                 uchar |= (ret[0] << byte_bit);
 291                 cmos_write(uchar, byte);
 292                 if (byte >= LB_CKS_RANGE_START && byte <= LB_CKS_RANGE_END)
 293                         chksum_update_needed = 1;
 294         } else {                        /* more that one byte so transfer the whole bytes */
 295                 if (byte_bit || length % 8)
 296                         return -1;
 297
 298                 for(i=0; length; i++, length-=8, byte++)
 299                         cmos_write(ret[i], byte);
 300                         if (byte >= LB_CKS_RANGE_START && byte <= LB_CKS_RANGE_END)
 301                                 chksum_update_needed = 1;
 302         }
 303
 304         if (chksum_update_needed) {
 305                 rtc_set_checksum(LB_CKS_RANGE_START,
 306                         LB_CKS_RANGE_END,LB_CKS_LOC);
 307         }
 308         return 0;
 309 }
 310
 311
 312 int set_option(const char *name, void *value)
 313 {
 314         struct cmos_option_table *ct;
 315         struct cmos_entries *ce;
 316         unsigned long length;
 317         size_t namelen;
 318         int found=0;
 319
 320         /* Figure out how long name is */
 321         namelen = strnlen(name, CMOS_MAX_NAME_LENGTH);
 322
 323         /* find the requested entry record */
 324         ct=cbfs_find_file("cmos_layout.bin", CBFS_COMPONENT_CMOS_LAYOUT);
 325         if (!ct) {
 326                 printk(BIOS_ERR, "cmos_layout.bin could not be found. Options are disabled\n");
 327                 return(-2);
 328         }
 329         ce=(struct cmos_entries*)((unsigned char *)ct + ct->header_length);
 330         for(;ce->tag==LB_TAG_OPTION;
 331                 ce=(struct cmos_entries*)((unsigned char *)ce + ce->size)) {
 332                 if (memcmp(ce->name, name, namelen) == 0) {
 333                         found=1;
 334                         break;
 335                 }
 336         }
 337         if(!found) {
 338                 printk(BIOS_DEBUG, "WARNING: No CMOS option '%s'.\n", name);
 339                 return(-2);
 340         }
 341
 342         length = ce->length;
 343         if (ce->config == 's') {
 344                 length = MAX(strlen((const char *)value) * 8, ce->length - 8);
 345                 /* make sure the string is null terminated */
 346                 if ((set_cmos_value(ce->bit + ce->length - 8, 8, &(u8[]){0})))
 347                         return (-3);
 348         }
 349
 350         if ((set_cmos_value(ce->bit, length, value)))
 351                 return (-3);
 352
 353         return 0;
 354 }
 355 #endif /* CONFIG_USE_OPTION_TABLE */
 356
 357 /*
 358  * If the CMOS is cleared, the rtc_reg has the invalid date. That
 359  * hurts some OSes. Even if we don't set USE_OPTION_TABLE, we need
 360  * to make sure the date is valid.
 361  */
 362 void rtc_check_update_cmos_date(u8 has_century)
 363 {
 364         u8 year, century;
 365
 366         /* Note: We need to check if the hardware supports RTC_CLK_ALTCENTURY. */
 367         century = has_century ? cmos_read(RTC_CLK_ALTCENTURY) : 0;
 368         year    = cmos_read(RTC_CLK_YEAR);
 369
 370         /* TODO: If century is 0xFF, 100% that the cmos is cleared.
 371          * Other than that, so far rtc_year is the only entry to check if the date is valid. */
 372         if (century > 0x99 || year > 0x99) {    /* Invalid date */
 373                 rtc_update_cmos_date(has_century);
 374         }
 375 }