2 * This file is part of the coreboot project.
4 * Copyright (C) 2011 Advanced Micro Devices, Inc.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
21 * ACPI - create the Fixed ACPI Description Tables (FADT)
25 #include <console/console.h>
26 #include <arch/acpi.h>
28 #include <device/device.h>
29 #include "SBPLATFORM.h"
31 void acpi_create_fadt(acpi_fadt_t
* fadt
, acpi_facs_t
* facs
, void *dsdt
)
34 acpi_header_t
*header
= &(fadt
->header
);
36 printk(BIOS_DEBUG
, "ACPI_BLK_BASE: 0x%04x\n", ACPI_BLK_BASE
);
38 /* Prepare the header */
39 memset((void *)fadt
, 0, sizeof(acpi_fadt_t
));
40 memcpy(header
->signature
, "FACP", 4);
43 memcpy(header
->oem_id
, OEM_ID
, 6);
44 memcpy(header
->oem_table_id
, ACPI_TABLE_CREATOR
, 8);
45 memcpy(header
->asl_compiler_id
, ASLC
, 4);
46 header
->asl_compiler_revision
= 0;
48 fadt
->firmware_ctrl
= (u32
) facs
;
49 fadt
->dsdt
= (u32
) dsdt
;
50 /* 3=Workstation,4=Enterprise Server, 7=Performance Server */
51 fadt
->preferred_pm_profile
= 0x03;
53 /* disable system management mode by setting to 0: */
55 fadt
->acpi_enable
= 0xf0;
56 fadt
->acpi_disable
= 0xf1;
57 fadt
->s4bios_req
= 0x0;
58 fadt
->pstate_cnt
= 0xe2;
60 val
= PM1_EVT_BLK_ADDRESS
;
61 WritePMIO(SB_PMIOA_REG60
, AccWidthUint16
, &val
);
62 val
= PM1_CNT_BLK_ADDRESS
;
63 WritePMIO(SB_PMIOA_REG62
, AccWidthUint16
, &val
);
64 val
= PM1_TMR_BLK_ADDRESS
;
65 WritePMIO(SB_PMIOA_REG64
, AccWidthUint16
, &val
);
66 val
= GPE0_BLK_ADDRESS
;
67 WritePMIO(SB_PMIOA_REG68
, AccWidthUint16
, &val
);
69 /* CpuControl is in \_PR.CPU0, 6 bytes */
70 val
= CPU_CNT_BLK_ADDRESS
;
71 WritePMIO(SB_PMIOA_REG66
, AccWidthUint16
, &val
);
73 WritePMIO(SB_PMIOA_REG6A
, AccWidthUint16
, &val
);
74 val
= ACPI_PMA_CNT_BLK_ADDRESS
;
75 WritePMIO(SB_PMIOA_REG6C
, AccWidthUint16
, &val
);
77 /* AcpiDecodeEnable, When set, SB uses the contents of the
78 * PM registers at index 60-6B to decode ACPI I/O address.
79 * AcpiSmiEn & SmiCmdEn
81 val
= BIT0
| BIT1
| BIT2
| BIT4
;
82 WritePMIO(SB_PMIOA_REG74
, AccWidthUint16
, &val
);
84 /* RTC_En_En, TMR_En_En, GBL_EN_EN */
85 outl(0x1, PM1_CNT_BLK_ADDRESS
); /* set SCI_EN */
87 fadt
->pm1a_evt_blk
= PM1_EVT_BLK_ADDRESS
;
88 fadt
->pm1b_evt_blk
= 0x0000;
89 fadt
->pm1a_cnt_blk
= PM1_CNT_BLK_ADDRESS
;
90 fadt
->pm1b_cnt_blk
= 0x0000;
91 fadt
->pm2_cnt_blk
= ACPI_PMA_CNT_BLK_ADDRESS
;
92 fadt
->pm_tmr_blk
= PM1_TMR_BLK_ADDRESS
;
93 fadt
->gpe0_blk
= GPE0_BLK_ADDRESS
;
94 fadt
->gpe1_blk
= 0x0000; /* we dont have gpe1 block, do we? */
96 fadt
->pm1_evt_len
= 4;
97 fadt
->pm1_cnt_len
= 2;
98 fadt
->pm2_cnt_len
= 1;
100 fadt
->gpe0_blk_len
= 8;
101 fadt
->gpe1_blk_len
= 0;
104 fadt
->cst_cnt
= 0xe3;
105 fadt
->p_lvl2_lat
= 101;
106 fadt
->p_lvl3_lat
= 1001;
107 fadt
->flush_size
= 0;
108 fadt
->flush_stride
= 0;
109 fadt
->duty_offset
= 1;
110 fadt
->duty_width
= 3;
111 fadt
->day_alrm
= 0; /* 0x7d these have to be */
112 fadt
->mon_alrm
= 0; /* 0x7e added to cmos.layout */
113 fadt
->century
= 0; /* 0x7f to make rtc alrm work */
114 fadt
->iapc_boot_arch
= 0x3; /* See table 5-11 */
115 fadt
->flags
= 0x0001c1a5;/* 0x25; */
119 fadt
->reset_reg
.space_id
= 1;
120 fadt
->reset_reg
.bit_width
= 8;
121 fadt
->reset_reg
.bit_offset
= 0;
122 fadt
->reset_reg
.resv
= 0;
123 fadt
->reset_reg
.addrl
= 0xcf9;
124 fadt
->reset_reg
.addrh
= 0x0;
126 fadt
->reset_value
= 6;
127 fadt
->x_firmware_ctl_l
= (u32
) facs
;
128 fadt
->x_firmware_ctl_h
= 0;
129 fadt
->x_dsdt_l
= (u32
) dsdt
;
132 fadt
->x_pm1a_evt_blk
.space_id
= 1;
133 fadt
->x_pm1a_evt_blk
.bit_width
= 32;
134 fadt
->x_pm1a_evt_blk
.bit_offset
= 0;
135 fadt
->x_pm1a_evt_blk
.resv
= 0;
136 fadt
->x_pm1a_evt_blk
.addrl
= PM1_EVT_BLK_ADDRESS
;
137 fadt
->x_pm1a_evt_blk
.addrh
= 0x0;
139 fadt
->x_pm1b_evt_blk
.space_id
= 1;
140 fadt
->x_pm1b_evt_blk
.bit_width
= 4;
141 fadt
->x_pm1b_evt_blk
.bit_offset
= 0;
142 fadt
->x_pm1b_evt_blk
.resv
= 0;
143 fadt
->x_pm1b_evt_blk
.addrl
= 0x0;
144 fadt
->x_pm1b_evt_blk
.addrh
= 0x0;
146 fadt
->x_pm1a_cnt_blk
.space_id
= 1;
147 fadt
->x_pm1a_cnt_blk
.bit_width
= 16;
148 fadt
->x_pm1a_cnt_blk
.bit_offset
= 0;
149 fadt
->x_pm1a_cnt_blk
.resv
= 0;
150 fadt
->x_pm1a_cnt_blk
.addrl
= PM1_CNT_BLK_ADDRESS
;
151 fadt
->x_pm1a_cnt_blk
.addrh
= 0x0;
153 fadt
->x_pm1b_cnt_blk
.space_id
= 1;
154 fadt
->x_pm1b_cnt_blk
.bit_width
= 2;
155 fadt
->x_pm1b_cnt_blk
.bit_offset
= 0;
156 fadt
->x_pm1b_cnt_blk
.resv
= 0;
157 fadt
->x_pm1b_cnt_blk
.addrl
= 0x0;
158 fadt
->x_pm1b_cnt_blk
.addrh
= 0x0;
160 fadt
->x_pm2_cnt_blk
.space_id
= 1;
161 fadt
->x_pm2_cnt_blk
.bit_width
= 0;
162 fadt
->x_pm2_cnt_blk
.bit_offset
= 0;
163 fadt
->x_pm2_cnt_blk
.resv
= 0;
164 fadt
->x_pm2_cnt_blk
.addrl
= ACPI_PMA_CNT_BLK_ADDRESS
;
165 fadt
->x_pm2_cnt_blk
.addrh
= 0x0;
167 fadt
->x_pm_tmr_blk
.space_id
= 1;
168 fadt
->x_pm_tmr_blk
.bit_width
= 32;
169 fadt
->x_pm_tmr_blk
.bit_offset
= 0;
170 fadt
->x_pm_tmr_blk
.resv
= 0;
171 fadt
->x_pm_tmr_blk
.addrl
= PM1_TMR_BLK_ADDRESS
;
172 fadt
->x_pm_tmr_blk
.addrh
= 0x0;
174 fadt
->x_gpe0_blk
.space_id
= 1;
175 fadt
->x_gpe0_blk
.bit_width
= 32;
176 fadt
->x_gpe0_blk
.bit_offset
= 0;
177 fadt
->x_gpe0_blk
.resv
= 0;
178 fadt
->x_gpe0_blk
.addrl
= GPE0_BLK_ADDRESS
;
179 fadt
->x_gpe0_blk
.addrh
= 0x0;
181 fadt
->x_gpe1_blk
.space_id
= 1;
182 fadt
->x_gpe1_blk
.bit_width
= 0;
183 fadt
->x_gpe1_blk
.bit_offset
= 0;
184 fadt
->x_gpe1_blk
.resv
= 0;
185 fadt
->x_gpe1_blk
.addrl
= 0;
186 fadt
->x_gpe1_blk
.addrh
= 0x0;
188 header
->checksum
= acpi_checksum((void *)fadt
, sizeof(acpi_fadt_t
));