src/soc/intel/apollolake/lpc.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2015-2016 Intel Corp.
   5  * (Written by Lance Zhao <lijian.zhao@intel.com> for Intel Corp.)
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; either version 2 of the License, or
  10  * (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  */
  17
  18 #include <cbmem.h>
  19 #include <console/console.h>
  20 #include <device/device.h>
  21 #include <device/pci.h>
  22 #include <device/pci_ids.h>
  23 #include <pc80/mc146818rtc.h>
  24 #include <soc/acpi.h>
  25 #include <soc/lpc.h>
  26 #include <soc/pm.h>
  27 #include <vboot/vbnv.h>
  28
  29 #include "chip.h"
  30
  31 /*
  32  * SCOPE:
  33  * The purpose of this driver is to eliminate manual resource allocation for
  34  * devices under the LPC bridge.
  35  *
  36  * BACKGROUND:
  37  * The resource allocator reserves IO and memory resources to devices on the
  38  * LPC bus, but it is up to the hardware driver to make sure that those
  39  * resources are decoded to the LPC bus. This is what this driver does.
  40  *
  41  * THEORY OF OPERATION:
  42  * The .scan_bus member of the driver's ops will scan the static device tree
  43  * (devicetree.cb) and invoke drivers of devices on the LPC bus. This creates
  44  * a list of child devices, along with their resources. set_child_resources()
  45  * parses that list and looks for resources needed by the child devices. It
  46  * opens up IO and memory windows as needed.
  47  */
  48
  49 static void rtc_init(void)
  50 {
  51         int rtc_fail;
  52         const struct chipset_power_state *ps = cbmem_find(CBMEM_ID_POWER_STATE);
  53
  54         if (!ps) {
  55                 printk(BIOS_ERR, "Could not find power state in cbmem, RTC init aborted\n");
  56                 return;
  57         }
  58
  59         rtc_fail = !!(ps->gen_pmcon1 & RPS);
  60         /* Ensure the date is set including century byte. */
  61         cmos_check_update_date();
  62         if (IS_ENABLED(CONFIG_VBOOT_VBNV_CMOS))
  63                 init_vbnv_cmos(rtc_fail);
  64         else
  65                 cmos_init(rtc_fail);
  66 }
  67
  68 static void lpc_init(struct device *dev)
  69 {
  70         uint8_t scnt;
  71         struct soc_intel_apollolake_config *cfg;
  72
  73         cfg = dev->chip_info;
  74         if (!cfg) {
  75                 printk(BIOS_ERR, "BUG! Could not find SOC devicetree config\n");
  76                 return;
  77         }
  78
  79         scnt = pci_read_config8(dev, REG_SERIRQ_CTL);
  80         scnt &= ~(SCNT_EN | SCNT_MODE);
  81         if (cfg->serirq_mode == SERIRQ_QUIET)
  82                 scnt |= SCNT_EN;
  83         else if (cfg->serirq_mode == SERIRQ_CONTINUOUS)
  84                 scnt |= SCNT_EN | SCNT_MODE;
  85         pci_write_config8(dev, REG_SERIRQ_CTL, scnt);
  86
  87         /* Initialize RTC */
  88         rtc_init();
  89 }
  90
  91 static void soc_lpc_add_io_resources(device_t dev)
  92 {
  93         struct resource *res;
  94
  95         /* Add the default claimed legacy IO range for the LPC device. */
  96         res = new_resource(dev, 0);
  97         res->base = 0;
  98         res->size = 0x1000;
  99         res->flags = IORESOURCE_IO | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
 100 }
 101
 102 static void soc_lpc_read_resources(device_t dev)
 103 {
 104         /* Get the PCI resources of this device. */
 105         pci_dev_read_resources(dev);
 106
 107         /* Add IO resources to LPC. */
 108         soc_lpc_add_io_resources(dev);
 109 }
 110
 111 static void set_child_resources(struct device *dev);
 112
 113 static void loop_resources(struct device *dev)
 114 {
 115         struct resource *res;
 116
 117         for (res = dev->resource_list; res; res = res->next) {
 118
 119                 if (res->flags & IORESOURCE_IO)
 120                         lpc_open_pmio_window(res->base, res->size);
 121
 122                 if (res->flags & IORESOURCE_MEM) {
 123                         /* Check if this is already decoded. */
 124                         if (lpc_fits_fixed_mmio_window(res->base, res->size))
 125                                 continue;
 126
 127                         lpc_open_mmio_window(res->base, res->size);
 128                 }
 129
 130         }
 131         set_child_resources(dev);
 132 }
 133
 134 /*
 135  * Loop through all the child devices' resources, and open up windows to the
 136  * LPC bus, as appropriate.
 137  */
 138 static void set_child_resources(struct device *dev)
 139 {
 140         struct bus *link;
 141         struct device *child;
 142
 143         for (link = dev->link_list; link; link = link->next) {
 144                 for (child = link->children; child; child = child->sibling)
 145                         loop_resources(child);
 146         }
 147 }
 148
 149 static void set_resources(device_t dev)
 150 {
 151         pci_dev_set_resources(dev);
 152
 153         /* Close all previously opened windows and allocate from scratch. */
 154         lpc_close_pmio_windows();
 155         /* Now open up windows to devices which have declared resources. */
 156         set_child_resources(dev);
 157 }
 158
 159 static struct device_operations device_ops = {
 160         .read_resources = &soc_lpc_read_resources,
 161         .set_resources = set_resources,
 162         .enable_resources = &pci_dev_enable_resources,
 163         .write_acpi_tables = southbridge_write_acpi_tables,
 164         .acpi_inject_dsdt_generator = southbridge_inject_dsdt,
 165         .init = lpc_init,
 166         .scan_bus = scan_lpc_bus,
 167 };
 168
 169 static const unsigned short pci_device_ids[] = {
 170         PCI_DEVICE_ID_INTEL_APL_LPC,
 171         PCI_DEVICE_ID_INTEL_GLK_LPC,
 172         0,
 173 };
 174
 175 static const struct pci_driver soc_lpc __pci_driver = {
 176         .ops = &device_ops,
 177         .vendor = PCI_VENDOR_ID_INTEL,
 178         .devices = pci_device_ids,
 179 };