src/southbridge/via/vt8237r/sata.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2007, 2008 Rudolf Marek <r.marek@assembler.cz>
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; version 2 of the License.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  */
  15
  16 #include <console/console.h>
  17 #include <device/device.h>
  18 #include <device/pci.h>
  19 #include <device/pci_ids.h>
  20
  21 #define SATA_MISC_CTRL 0x45
  22
  23 static void sata_i_init(struct device *dev)
  24 {
  25         u8 reg;
  26
  27         printk(BIOS_DEBUG, "Configuring VIA SATA controller\n");
  28
  29         /* Class IDE Disk */
  30         reg = pci_read_config8(dev, SATA_MISC_CTRL);
  31         reg &= 0x7f;            /* Sub Class Write Protect off */
  32         pci_write_config8(dev, SATA_MISC_CTRL, reg);
  33
  34         /* Change the device class to SATA from RAID. */
  35         pci_write_config8(dev, PCI_CLASS_DEVICE, 0x1);
  36         reg |= 0x80;            /* Sub Class Write Protect on */
  37         pci_write_config8(dev, SATA_MISC_CTRL, reg);
  38
  39         return;
  40 }
  41
  42 static void sata_ii_init(struct device *dev)
  43 {
  44         u8 reg;
  45
  46         sata_i_init(dev);
  47
  48         /*
  49          * Analog black magic, you may or may not need to adjust 0x60-0x6f,
  50          * depends on PCB.
  51          */
  52
  53         /*
  54          * Analog PHY - gen1
  55          * CDR bandwidth [6:5] = 3
  56          * Squelch Window Select [4:3] = 1
  57          * CDR Charge Pump [2:0] = 1
  58          */
  59
  60         pci_write_config8(dev, 0x64, 0x49);
  61
  62         /* Adjust driver current source value to 9. */
  63         reg = pci_read_config8(dev, 0x65);
  64         reg &= 0xf0;
  65         reg |= 0x9;
  66         pci_write_config8(dev, 0x65, reg);
  67
  68         /* Set all manual termination 50ohm bits [2:0] and enable [4]. */
  69         reg = pci_read_config8(dev, 0x6a);
  70         reg |= 0xf;
  71         pci_write_config8(dev, 0x6a, reg);
  72
  73         /*
  74          * Analog PHY - gen2
  75          * CDR bandwidth [5:4] = 2
  76          * Pre / De-emphasis Level [7:6] controls bits [3:2], rest in 0x6e
  77          * CDR Charge Pump [2:0] = 1
  78          */
  79
  80         reg = pci_read_config8(dev, 0x6f);
  81         reg &= 0x08;
  82         reg |= 0x61;
  83         pci_write_config8(dev, 0x6f, reg);
  84
  85         /* Check if staggered spinup is supported. */
  86         reg = pci_read_config8(dev, 0x83);
  87         if ((reg & 0x8) == 0) {
  88                 /* Start OOB sequence on both drives. */
  89                 reg |= 0x30;
  90                 pci_write_config8(dev, 0x83, reg);
  91         }
  92 }
  93
  94
  95 static void vt8237_set_subsystem(struct device *dev, unsigned vendor,
  96                                  unsigned device)
  97 {
  98         pci_write_config16(dev, 0xd4, vendor);
  99         pci_write_config16(dev, 0xd6, device);
 100 }
 101
 102 static struct pci_operations lops_pci = {
 103         .set_subsystem = vt8237_set_subsystem,
 104 };
 105
 106 static const struct device_operations sata_i_ops = {
 107         .read_resources         = pci_dev_read_resources,
 108         .set_resources          = pci_dev_set_resources,
 109         .enable_resources       = pci_dev_enable_resources,
 110         .init                   = sata_i_init,
 111         .enable                 = 0,
 112         .ops_pci                = &lops_pci,
 113 };
 114
 115 static const struct device_operations sata_ii_ops = {
 116         .read_resources         = pci_dev_read_resources,
 117         .set_resources          = pci_dev_set_resources,
 118         .enable_resources       = pci_dev_enable_resources,
 119         .init                   = sata_ii_init,
 120         .enable                 = 0,
 121         .ops_pci                = &lops_pci,
 122 };
 123
 124 static const struct pci_driver northbridge_driver_ii __pci_driver = {
 125         .ops    = &sata_ii_ops,
 126         .vendor = PCI_VENDOR_ID_VIA,
 127         .device = PCI_DEVICE_ID_VIA_VT8237_SATA,
 128 };
 129
 130 static const struct pci_driver northbridge_driver_i_a __pci_driver = {
 131         .ops    = &sata_i_ops,
 132         .vendor = PCI_VENDOR_ID_VIA,
 133         .device = PCI_DEVICE_ID_VIA_VT8237A_SATA,
 134 };
 135
 136 static const struct pci_driver northbridge_driver_i __pci_driver = {
 137         .ops    = &sata_i_ops,
 138         .vendor = PCI_VENDOR_ID_VIA,
 139         .device = PCI_DEVICE_ID_VIA_VT6420_SATA,
 140 };