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cpu/intel (non-FSP): Use microcode from blobs repository
[coreboot.git]
/
src
/
cpu
/
intel
/
model_6ex
/
Makefile.inc
blob
6d943023c88673a9a5aaefad5bbd019933f4eef4
1
ramstage-y += model_6ex_init.c
2
subdirs-y += ../../x86/name
3
4
cpu_microcode-$(CONFIG_CPU_MICROCODE_CBFS_GENERATE) += microcode_blob.c
