src/mainboard/intel/kunimitsu/smihandler.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2008-2009 coresystems GmbH
   5  * Copyright (C) 2015 Intel Corp.
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; version 2 of the License.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  */
  16
  17 #include <arch/acpi.h>
  18 #include <console/console.h>
  19 #include <cpu/x86/smm.h>
  20 #include <elog.h>
  21 #include <ec/google/chromeec/smm.h>
  22 #include <soc/iomap.h>
  23 #include <soc/nvs.h>
  24 #include <soc/pm.h>
  25 #include <soc/smm.h>
  26 #include "ec.h"
  27 #include "gpio.h"
  28
  29 int mainboard_io_trap_handler(int smif)
  30 {
  31         switch (smif) {
  32         case 0x99:
  33                 printk(BIOS_DEBUG, "Sample\n");
  34                 smm_get_gnvs()->smif = 0;
  35                 break;
  36         default:
  37                 return 0;
  38         }
  39
  40         /* On success, the IO Trap Handler returns 0
  41          * On failure, the IO Trap Handler returns a value != 0
  42          *
  43          * For now, we force the return value to 0 and log all traps to
  44          * see what's going on.
  45          */
  46         return 1;
  47 }
  48
  49 void mainboard_smi_gpi_handler(const struct gpi_status *sts)
  50 {
  51         if (gpi_status_get(sts, EC_SMI_GPI))
  52                 chromeec_smi_process_events();
  53 }
  54
  55 void mainboard_smi_sleep(u8 slp_typ)
  56 {
  57         if (CONFIG(EC_GOOGLE_CHROMEEC))
  58                 chromeec_smi_sleep(slp_typ, MAINBOARD_EC_S3_WAKE_EVENTS,
  59                                         MAINBOARD_EC_S5_WAKE_EVENTS);
  60 }
  61
  62 int mainboard_smi_apmc(u8 apmc)
  63 {
  64         if (CONFIG(EC_GOOGLE_CHROMEEC))
  65                 chromeec_smi_apmc(apmc, MAINBOARD_EC_SCI_EVENTS,
  66                                         MAINBOARD_EC_SMI_EVENTS);
  67         return 0;
  68 }