src/mainboard/intel/kunimitsu/chromeos.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2013 Google Inc.
   5  * Copyright (C) 2015 Intel Corporation.
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; version 2 of the License.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  */
  16
  17 #include <gpio.h>
  18 #include <soc/gpio.h>
  19 #include <vendorcode/google/chromeos/chromeos.h>
  20
  21 #include "gpio.h"
  22
  23 #if ENV_RAMSTAGE
  24 #include <boot/coreboot_tables.h>
  25
  26 void fill_lb_gpios(struct lb_gpios *gpios)
  27 {
  28         struct lb_gpio chromeos_gpios[] = {
  29                 {-1, ACTIVE_HIGH, get_write_protect_state(), "write protect"},
  30                 {-1, ACTIVE_HIGH, get_lid_switch(), "lid"},
  31                 {-1, ACTIVE_HIGH, 0, "power"},
  32                 {-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"},
  33                 {GPIO_EC_IN_RW, ACTIVE_HIGH,
  34                         gpio_get(GPIO_EC_IN_RW), "EC in RW"},
  35         };
  36         lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios));
  37 }
  38 #endif /* ENV_RAMSTAGE */
  39
  40 int get_write_protect_state(void)
  41 {
  42         /* Read PCH_WP GPIO. */
  43         return gpio_get(GPIO_PCH_WP);
  44 }
  45
  46 static const struct cros_gpio cros_gpios[] = {
  47         CROS_GPIO_REC_AL(CROS_GPIO_VIRTUAL, CROS_GPIO_DEVICE_NAME),
  48         CROS_GPIO_WP_AH(GPIO_PCH_WP, CROS_GPIO_DEVICE_NAME),
  49 };
  50
  51 void mainboard_chromeos_acpi_generate(void)
  52 {
  53         chromeos_acpi_gpio_generate(cros_gpios, ARRAY_SIZE(cros_gpios));
  54 }