src/mainboard/google/nyan/pmic.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright 2014 Google Inc.
   5  * Copyright (c) 2013, NVIDIA CORPORATION.  All rights reserved.
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; version 2 of the License.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  */
  16
  17 #include <boardid.h>
  18 #include <console/console.h>
  19 #include <delay.h>
  20 #include <device/i2c_simple.h>
  21 #include <stdint.h>
  22 #include <stdlib.h>
  23 #include <reset.h>
  24
  25 #include "pmic.h"
  26
  27 enum {
  28         AS3722_I2C_ADDR = 0x40
  29 };
  30
  31 struct as3722_init_reg {
  32         u8 reg;
  33         u8 val;
  34         u8 delay;
  35 };
  36
  37 static struct as3722_init_reg init_list[] = {
  38         {AS3722_SDO0, 0x3C, 1},
  39         {AS3722_SDO1, 0x32, 0},
  40         {AS3722_LDO3, 0x59, 0},
  41         {AS3722_SDO2, 0x3C, 0},
  42         {AS3722_SDO3, 0x00, 0},
  43         {AS3722_SDO4, 0x00, 0},
  44         {AS3722_SDO5, 0x50, 0},
  45         {AS3722_SDO6, 0x28, 1},
  46         {AS3722_LDO0, 0x8A, 0},
  47         {AS3722_LDO1, 0x00, 0},
  48         {AS3722_LDO2, 0x10, 0},
  49         {AS3722_LDO4, 0x00, 0},
  50         {AS3722_LDO5, 0x00, 0},
  51         {AS3722_LDO6, 0x00, 0},
  52         {AS3722_LDO7, 0x00, 0},
  53         {AS3722_LDO9, 0x00, 0},
  54         {AS3722_LDO10, 0x00, 0},
  55         {AS3722_LDO11, 0x00, 1},
  56 };
  57
  58 static void pmic_write_reg(unsigned bus, uint8_t reg, uint8_t val, int do_delay)
  59 {
  60                 if (i2c_writeb(bus, AS3722_I2C_ADDR, reg, val)) {
  61                 printk(BIOS_ERR, "%s: reg = 0x%02X, value = 0x%02X failed!\n",
  62                         __func__, reg, val);
  63                 /* Reset the SoC on any PMIC write error */
  64                 board_reset();
  65         } else {
  66                 if (do_delay)
  67                         udelay(500);
  68         }
  69 }
  70
  71 static void pmic_slam_defaults(unsigned bus)
  72 {
  73         int i;
  74         for (i = 0; i < ARRAY_SIZE(init_list); i++) {
  75                 struct as3722_init_reg *reg = &init_list[i];
  76                 pmic_write_reg(bus, reg->reg, reg->val, reg->delay);
  77         }
  78 }
  79
  80 void pmic_init(unsigned bus)
  81 {
  82         /*
  83          * Don't need to set up VDD_CORE - already done - by OTP
  84          * Don't write SDCONTROL - it's already 0x7F, i.e. all SDs enabled.
  85          * Don't write LDCONTROL - it's already 0xFF, i.e. all LDOs enabled.
  86          */
  87
  88         /* Restore PMIC POR defaults, in case kernel changed 'em */
  89         pmic_slam_defaults(bus);
  90
  91         /* First set VDD_CPU to 1.2V, then enable the VDD_CPU regulator. */
  92         if (board_id() == 0)
  93                 pmic_write_reg(bus, 0x00, 0x3c, 1);
  94         else
  95                 pmic_write_reg(bus, 0x00, 0x50, 1);
  96
  97         /* First set VDD_GPU to 1.0V, then enable the VDD_GPU regulator. */
  98         pmic_write_reg(bus, 0x06, 0x28, 1);
  99
 100         /*
 101          * First set +1.2V_GEN_AVDD to 1.2V, then enable the +1.2V_GEN_AVDD
 102          * regulator.
 103          */
 104         pmic_write_reg(bus, 0x12, 0x10, 1);
 105
 106         /*
 107          * Panel power GPIO O4. Set mode for GPIO4 (0x0c to 7), then set
 108          * the value (register 0x20 bit 4)
 109          */
 110         pmic_write_reg(bus, 0x0c, 0x07, 0);
 111         pmic_write_reg(bus, 0x20, 0x10, 1);
 112 }