2 * This file is part of the coreboot project.
4 * Copyright 2014 Google Inc.
5 * Copyright (c) 2013-2015, NVIDIA CORPORATION. All rights reserved.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
18 #include <console/console.h>
20 #include <device/i2c_simple.h>
28 MAX77620_I2C_ADDR
= 0x3c
31 struct max77620_init_reg
{
37 static struct max77620_init_reg init_list
[] = {
41 static void pmic_write_reg(unsigned bus
, uint8_t reg
, uint8_t val
, int delay
)
43 if (i2c_writeb(bus
, MAX77620_I2C_ADDR
, reg
, val
)) {
44 printk(BIOS_ERR
, "%s: reg = 0x%02X, value = 0x%02X failed!\n",
46 /* Reset the board on any PMIC write error */
54 static void pmic_slam_defaults(unsigned bus
)
57 for (i
= 0; i
< ARRAY_SIZE(init_list
); i
++) {
58 struct max77620_init_reg
*reg
= &init_list
[i
];
59 pmic_write_reg(bus
, reg
->reg
, reg
->val
, reg
->delay
);
63 void pmic_init(unsigned bus
)
65 /* Restore PMIC POR defaults, in case kernel changed 'em */
66 pmic_slam_defaults(bus
);
68 /* Setup/Enable GPIO5 - VDD_CPU_REG_EN */
69 pmic_write_reg(bus
, MAX77620_GPIO5_REG
, 0x09, 1);
71 /* Setup/Enable GPIO1 - VDD_HDMI_5V0_BST_EN -- ??? */
72 pmic_write_reg(bus
, MAX77620_GPIO1_REG
, 0x09, 1);
74 /* GPIO 0,1,5,6,7 = GPIO, 2,3,4 = alt mode */
75 pmic_write_reg(bus
, MAX77620_AME_GPIO
, 0x1c, 1);
77 /* Disable SD1 Remote Sense, Set SD1 for LPDDR4 to 1.125v? */
78 pmic_write_reg(bus
, MAX77620_CNFG2SD_REG
, 0x04, 1);
80 pmic_write_reg(bus
, MAX77620_SD1_REG
, 0x2a, 1);
82 /* CNFG1_L2 = 0xF2 for 3.3v, enabled */
83 pmic_write_reg(bus
, MAX77620_CNFG1_L2_REG
, 0xf2, 1);
85 /* CNFG1_L1 = 0xCA for 1.05v, enabled */
86 pmic_write_reg(bus
, MAX77620_CNFG1_L1_REG
, 0xca, 1);
88 printk(BIOS_DEBUG
, "PMIC init done\n");