src/arch/arm64/armv8/lib/sysctrl.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2014 Google Inc
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License as
   8  * published by the Free Software Foundation; version 2 of
   9  * the License.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
  19  * MA 02110-1301 USA
  20  *
  21  * Reference: ARM Architecture Reference Manual, ARMv8-A edition
  22  * sysctrl.c: This file defines all the library functions for accessing system
  23  * control registers in Aarch64
  24  */
  25
  26 #include <stdint.h>
  27
  28 #include <arch/lib_helpers.h>
  29
  30 /* ACTLR */
  31 uint32_t raw_read_actlr_el1(void)
  32 {
  33         uint32_t actlr_el1;
  34
  35         __asm__ __volatile__("mrs %0, ACTLR_EL1\n\t" : "=r" (actlr_el1) :  : "memory");
  36
  37         return actlr_el1;
  38 }
  39
  40 void raw_write_actlr_el1(uint32_t actlr_el1)
  41 {
  42         __asm__ __volatile__("msr ACTLR_EL1, %0\n\t" : : "r" (actlr_el1) : "memory");
  43 }
  44
  45 uint32_t raw_read_actlr_el2(void)
  46 {
  47         uint32_t actlr_el2;
  48
  49         __asm__ __volatile__("mrs %0, ACTLR_EL2\n\t" : "=r" (actlr_el2) :  : "memory");
  50
  51         return actlr_el2;
  52 }
  53
  54 void raw_write_actlr_el2(uint32_t actlr_el2)
  55 {
  56         __asm__ __volatile__("msr ACTLR_EL2, %0\n\t" : : "r" (actlr_el2) : "memory");
  57 }
  58
  59 uint32_t raw_read_actlr_el3(void)
  60 {
  61         uint32_t actlr_el3;
  62
  63         __asm__ __volatile__("mrs %0, ACTLR_EL3\n\t" : "=r" (actlr_el3) :  : "memory");
  64
  65         return actlr_el3;
  66 }
  67
  68 void raw_write_actlr_el3(uint32_t actlr_el3)
  69 {
  70         __asm__ __volatile__("msr ACTLR_EL3, %0\n\t" : : "r" (actlr_el3) : "memory");
  71 }
  72
  73 uint32_t raw_read_actlr_current(void)
  74 {
  75         uint32_t el = get_current_el();
  76         return raw_read_actlr(el);
  77 }
  78
  79 void raw_write_actlr_current(uint32_t actlr)
  80 {
  81         uint32_t el = get_current_el();
  82         raw_write_actlr(actlr, el);
  83 }
  84
  85 uint32_t raw_read_actlr(uint32_t el)
  86 {
  87         SWITCH_CASE_READ(raw_read_actlr, actlr, uint32_t, el);
  88 }
  89
  90 void raw_write_actlr(uint32_t actlr, uint32_t el)
  91 {
  92         SWITCH_CASE_WRITE(raw_write_actlr, actlr, el);
  93 }
  94
  95 /* AFSR0 */
  96 uint32_t raw_read_afsr0_el1(void)
  97 {
  98         uint32_t afsr0_el1;
  99
 100         __asm__ __volatile__("mrs %0, AFSR0_EL1\n\t" : "=r" (afsr0_el1) :  : "memory");
 101
 102         return afsr0_el1;
 103 }
 104
 105 void raw_write_afsr0_el1(uint32_t afsr0_el1)
 106 {
 107         __asm__ __volatile__("msr AFSR0_EL1, %0\n\t" : : "r" (afsr0_el1) : "memory");
 108 }
 109
 110 uint32_t raw_read_afsr0_el2(void)
 111 {
 112         uint32_t afsr0_el2;
 113
 114         __asm__ __volatile__("mrs %0, AFSR0_EL2\n\t" : "=r" (afsr0_el2) :  : "memory");
 115
 116         return afsr0_el2;
 117 }
 118
 119 void raw_write_afsr0_el2(uint32_t afsr0_el2)
 120 {
 121         __asm__ __volatile__("msr AFSR0_EL2, %0\n\t" : : "r" (afsr0_el2) : "memory");
 122 }
 123
 124 uint32_t raw_read_afsr0_el3(void)
 125 {
 126         uint32_t afsr0_el3;
 127
 128         __asm__ __volatile__("mrs %0, AFSR0_EL3\n\t" : "=r" (afsr0_el3) :  : "memory");
 129
 130         return afsr0_el3;
 131 }
 132
 133 void raw_write_afsr0_el3(uint32_t afsr0_el3)
 134 {
 135         __asm__ __volatile__("msr AFSR0_EL3, %0\n\t" : : "r" (afsr0_el3) : "memory");
 136 }
 137
 138 uint32_t raw_read_afsr0_current(void)
 139 {
 140         uint32_t el = get_current_el();
 141         return raw_read_afsr0(el);
 142 }
 143
 144 void raw_write_afsr0_current(uint32_t afsr0)
 145 {
 146         uint32_t el = get_current_el();
 147         raw_write_afsr0(afsr0, el);
 148 }
 149
 150 uint32_t raw_read_afsr0(uint32_t el)
 151 {
 152         SWITCH_CASE_READ(raw_read_afsr0, afsr0, uint32_t, el);
 153 }
 154
 155 void raw_write_afsr0(uint32_t afsr0, uint32_t el)
 156 {
 157         SWITCH_CASE_WRITE(raw_write_afsr0, afsr0, el);
 158 }
 159
 160 /* AFSR1 */
 161 uint32_t raw_read_afsr1_el1(void)
 162 {
 163         uint32_t afsr1_el1;
 164
 165         __asm__ __volatile__("mrs %0, AFSR1_EL1\n\t" : "=r" (afsr1_el1) :  : "memory");
 166
 167         return afsr1_el1;
 168 }
 169
 170 void raw_write_afsr1_el1(uint32_t afsr1_el1)
 171 {
 172         __asm__ __volatile__("msr AFSR1_EL1, %0\n\t" : : "r" (afsr1_el1) : "memory");
 173 }
 174
 175 uint32_t raw_read_afsr1_el2(void)
 176 {
 177         uint32_t afsr1_el2;
 178
 179         __asm__ __volatile__("mrs %0, AFSR1_EL2\n\t" : "=r" (afsr1_el2) :  : "memory");
 180
 181         return afsr1_el2;
 182 }
 183
 184 void raw_write_afsr1_el2(uint32_t afsr1_el2)
 185 {
 186         __asm__ __volatile__("msr AFSR1_EL2, %0\n\t" : : "r" (afsr1_el2) : "memory");
 187 }
 188
 189 uint32_t raw_read_afsr1_el3(void)
 190 {
 191         uint32_t afsr1_el3;
 192
 193         __asm__ __volatile__("mrs %0, AFSR1_EL3\n\t" : "=r" (afsr1_el3) :  : "memory");
 194
 195         return afsr1_el3;
 196 }
 197
 198 void raw_write_afsr1_el3(uint32_t afsr1_el3)
 199 {
 200         __asm__ __volatile__("msr AFSR1_EL3, %0\n\t" : : "r" (afsr1_el3) : "memory");
 201 }
 202
 203 uint32_t raw_read_afsr1_current(void)
 204 {
 205         uint32_t el = get_current_el();
 206         return raw_read_afsr1(el);
 207 }
 208
 209 void raw_write_afsr1_current(uint32_t afsr1)
 210 {
 211         uint32_t el = get_current_el();
 212         raw_write_afsr1(afsr1, el);
 213 }
 214
 215 uint32_t raw_read_afsr1(uint32_t el)
 216 {
 217         SWITCH_CASE_READ(raw_read_afsr1, afsr1, uint32_t, el);
 218 }
 219
 220 void raw_write_afsr1(uint32_t afsr1, uint32_t el)
 221 {
 222         SWITCH_CASE_WRITE(raw_write_afsr1, afsr1, el);
 223 }
 224
 225 /* AIDR */
 226 uint32_t raw_read_aidr_el1(void)
 227 {
 228         uint32_t aidr_el1;
 229
 230         __asm__ __volatile__("mrs %0, AIDR_EL1\n\t" : "=r" (aidr_el1) :  : "memory");
 231
 232         return aidr_el1;
 233 }
 234
 235 /* AMAIR */
 236 uint64_t raw_read_amair_el1(void)
 237 {
 238         uint64_t amair_el1;
 239
 240         __asm__ __volatile__("mrs %0, AMAIR_EL1\n\t" : "=r" (amair_el1) :  : "memory");
 241
 242         return amair_el1;
 243 }
 244
 245 void raw_write_amair_el1(uint64_t amair_el1)
 246 {
 247         __asm__ __volatile__("msr AMAIR_EL1, %0\n\t" : : "r" (amair_el1) : "memory");
 248 }
 249
 250 uint64_t raw_read_amair_el2(void)
 251 {
 252         uint64_t amair_el2;
 253
 254         __asm__ __volatile__("mrs %0, AMAIR_EL2\n\t" : "=r" (amair_el2) :  : "memory");
 255
 256         return amair_el2;
 257 }
 258
 259 void raw_write_amair_el2(uint64_t amair_el2)
 260 {
 261         __asm__ __volatile__("msr AMAIR_EL2, %0\n\t" : : "r" (amair_el2) : "memory");
 262 }
 263
 264 uint64_t raw_read_amair_el3(void)
 265 {
 266         uint64_t amair_el3;
 267
 268         __asm__ __volatile__("mrs %0, AMAIR_EL3\n\t" : "=r" (amair_el3) :  : "memory");
 269
 270         return amair_el3;
 271 }
 272
 273 void raw_write_amair_el3(uint64_t amair_el3)
 274 {
 275         __asm__ __volatile__("msr AMAIR_EL3, %0\n\t" : : "r" (amair_el3) : "memory");
 276 }
 277
 278 uint64_t raw_read_amair_current(void)
 279 {
 280         uint32_t el = get_current_el();
 281         return raw_read_amair(el);
 282 }
 283
 284 void raw_write_amair_current(uint64_t amair)
 285 {
 286         uint32_t el = get_current_el();
 287         raw_write_amair(amair, el);
 288 }
 289
 290 uint64_t raw_read_amair(uint32_t el)
 291 {
 292         SWITCH_CASE_READ(raw_read_amair, amair, uint64_t, el);
 293 }
 294
 295 void raw_write_amair(uint64_t amair, uint32_t el)
 296 {
 297         SWITCH_CASE_WRITE(raw_write_amair, amair, el);
 298 }
 299
 300 /* CCSIDR */
 301 uint32_t raw_read_ccsidr_el1(void)
 302 {
 303         uint32_t ccsidr_el1;
 304
 305         __asm__ __volatile__("mrs %0, CCSIDR_EL1\n\t" : "=r" (ccsidr_el1) :  : "memory");
 306
 307         return ccsidr_el1;
 308 }
 309
 310 /* CLIDR */
 311 uint32_t raw_read_clidr_el1(void)
 312 {
 313         uint32_t clidr_el1;
 314
 315         __asm__ __volatile__("mrs %0, CLIDR_EL1\n\t" : "=r" (clidr_el1) :  : "memory");
 316
 317         return clidr_el1;
 318 }
 319
 320 /* CPACR */
 321 uint32_t raw_read_cpacr_el1(void)
 322 {
 323         uint32_t cpacr_el1;
 324
 325         __asm__ __volatile__("mrs %0, CPACR_EL1\n\t" : "=r" (cpacr_el1) :  : "memory");
 326
 327         return cpacr_el1;
 328 }
 329
 330 void raw_write_cpacr_el1(uint32_t cpacr_el1)
 331 {
 332         __asm__ __volatile__("msr CPACR_EL1, %0\n\t" : : "r" (cpacr_el1) : "memory");
 333 }
 334
 335 /* CPTR */
 336 uint32_t raw_read_cptr_el2(void)
 337 {
 338         uint32_t cptr_el2;
 339
 340         __asm__ __volatile__("mrs %0, CPTR_EL2\n\t" : "=r" (cptr_el2) :  : "memory");
 341
 342         return cptr_el2;
 343 }
 344
 345 void raw_write_cptr_el2(uint32_t cptr_el2)
 346 {
 347         __asm__ __volatile__("msr CPTR_EL2, %0\n\t" : : "r" (cptr_el2) : "memory");
 348 }
 349
 350 uint32_t raw_read_cptr_el3(void)
 351 {
 352         uint32_t cptr_el3;
 353
 354         __asm__ __volatile__("mrs %0, CPTR_EL3\n\t" : "=r" (cptr_el3) :  : "memory");
 355
 356         return cptr_el3;
 357 }
 358
 359 void raw_write_cptr_el3(uint32_t cptr_el3)
 360 {
 361         __asm__ __volatile__("msr CPTR_EL3, %0\n\t" : : "r" (cptr_el3) : "memory");
 362 }
 363
 364 /* CSSELR */
 365 uint32_t raw_read_csselr_el1(void)
 366 {
 367         uint32_t csselr_el1;
 368
 369         __asm__ __volatile__("mrs %0, CSSELR_EL1\n\t" : "=r" (csselr_el1) :  : "memory");
 370
 371         return csselr_el1;
 372 }
 373
 374 void raw_write_csselr_el1(uint32_t csselr_el1)
 375 {
 376         __asm__ __volatile__("msr CSSELR_EL1, %0\n\t" : : "r" (csselr_el1) : "memory");
 377 }
 378
 379 /* CTR */
 380 uint32_t raw_read_ctr_el0(void)
 381 {
 382         uint32_t ctr_el0;
 383
 384         __asm__ __volatile__("mrs %0, CTR_EL0\n\t" : "=r" (ctr_el0) :  : "memory");
 385
 386         return ctr_el0;
 387 }
 388
 389 /* ESR */
 390 uint32_t raw_read_esr_el1(void)
 391 {
 392         uint32_t esr_el1;
 393
 394         __asm__ __volatile__("mrs %0, ESR_EL1\n\t" : "=r" (esr_el1) :  : "memory");
 395
 396         return esr_el1;
 397 }
 398
 399 void raw_write_esr_el1(uint32_t esr_el1)
 400 {
 401         __asm__ __volatile__("msr ESR_EL1, %0\n\t" : : "r" (esr_el1) : "memory");
 402 }
 403
 404 uint32_t raw_read_esr_el2(void)
 405 {
 406         uint32_t esr_el2;
 407
 408         __asm__ __volatile__("mrs %0, ESR_EL2\n\t" : "=r" (esr_el2) :  : "memory");
 409
 410         return esr_el2;
 411 }
 412
 413 void raw_write_esr_el2(uint32_t esr_el2)
 414 {
 415         __asm__ __volatile__("msr ESR_EL2, %0\n\t" : : "r" (esr_el2) : "memory");
 416 }
 417
 418 uint32_t raw_read_esr_el3(void)
 419 {
 420         uint32_t esr_el3;
 421
 422         __asm__ __volatile__("mrs %0, ESR_EL3\n\t" : "=r" (esr_el3) :  : "memory");
 423
 424         return esr_el3;
 425 }
 426
 427 void raw_write_esr_el3(uint32_t esr_el3)
 428 {
 429         __asm__ __volatile__("msr ESR_EL3, %0\n\t" : : "r" (esr_el3) : "memory");
 430 }
 431
 432 uint32_t raw_read_esr_current(void)
 433 {
 434         uint32_t el = get_current_el();
 435         return raw_read_esr(el);
 436 }
 437
 438 void raw_write_esr_current(uint32_t esr)
 439 {
 440         uint32_t el = get_current_el();
 441         raw_write_esr(esr, el);
 442 }
 443
 444 uint32_t raw_read_esr(uint32_t el)
 445 {
 446         SWITCH_CASE_READ(raw_read_esr, esr, uint32_t, el);
 447 }
 448
 449 void raw_write_esr(uint32_t esr, uint32_t el)
 450 {
 451         SWITCH_CASE_WRITE(raw_write_esr, esr, el);
 452 }
 453
 454 /* FAR */
 455 uint64_t raw_read_far_el1(void)
 456 {
 457         uint64_t far_el1;
 458
 459         __asm__ __volatile__("mrs %0, FAR_EL1\n\t" : "=r" (far_el1) :  : "memory");
 460
 461         return far_el1;
 462 }
 463
 464 void raw_write_far_el1(uint64_t far_el1)
 465 {
 466         __asm__ __volatile__("msr FAR_EL1, %0\n\t" : : "r" (far_el1) : "memory");
 467 }
 468
 469 uint64_t raw_read_far_el2(void)
 470 {
 471         uint64_t far_el2;
 472
 473         __asm__ __volatile__("mrs %0, FAR_EL2\n\t" : "=r" (far_el2) :  : "memory");
 474
 475         return far_el2;
 476 }
 477
 478 void raw_write_far_el2(uint64_t far_el2)
 479 {
 480         __asm__ __volatile__("msr FAR_EL2, %0\n\t" : : "r" (far_el2) : "memory");
 481 }
 482
 483 uint64_t raw_read_far_el3(void)
 484 {
 485         uint64_t far_el3;
 486
 487         __asm__ __volatile__("mrs %0, FAR_EL3\n\t" : "=r" (far_el3) :  : "memory");
 488
 489         return far_el3;
 490 }
 491
 492 void raw_write_far_el3(uint64_t far_el3)
 493 {
 494         __asm__ __volatile__("msr FAR_EL3, %0\n\t" : : "r" (far_el3) : "memory");
 495 }
 496
 497 uint64_t raw_read_far_current(void)
 498 {
 499         uint32_t el = get_current_el();
 500         return raw_read_far(el);
 501 }
 502
 503 void raw_write_far_current(uint64_t far)
 504 {
 505         uint32_t el = get_current_el();
 506         raw_write_far(far, el);
 507 }
 508
 509 uint64_t raw_read_far(uint32_t el)
 510 {
 511         SWITCH_CASE_READ(raw_read_far, far, uint64_t, el);
 512 }
 513
 514 void raw_write_far(uint64_t far, uint32_t el)
 515 {
 516         SWITCH_CASE_WRITE(raw_write_far, far, el);
 517 }
 518
 519 /* HCR */
 520 uint64_t raw_read_hcr_el2(void)
 521 {
 522         uint64_t hcr_el2;
 523
 524         __asm__ __volatile__("mrs %0, HCR_EL2\n\t" : "=r" (hcr_el2) :  : "memory");
 525
 526         return hcr_el2;
 527 }
 528
 529 void raw_write_hcr_el2(uint64_t hcr_el2)
 530 {
 531         __asm__ __volatile__("msr HCR_EL2, %0\n\t" : : "r" (hcr_el2) : "memory");
 532 }
 533
 534 /* AA64PFR0 */
 535 uint64_t raw_read_aa64pfr0_el1(void)
 536 {
 537         uint64_t aa64pfr0_el1;
 538
 539         __asm__ __volatile__("mrs %0, ID_AA64PFR0_EL1\n\t" : "=r" (aa64pfr0_el1) :  : "memory");
 540
 541         return aa64pfr0_el1;
 542 }
 543
 544 /* MAIR */
 545 uint64_t raw_read_mair_el1(void)
 546 {
 547         uint64_t mair_el1;
 548
 549         __asm__ __volatile__("mrs %0, MAIR_EL1\n\t" : "=r" (mair_el1) :  : "memory");
 550
 551         return mair_el1;
 552 }
 553
 554 void raw_write_mair_el1(uint64_t mair_el1)
 555 {
 556         __asm__ __volatile__("msr MAIR_EL1, %0\n\t" : : "r" (mair_el1) : "memory");
 557 }
 558
 559 uint64_t raw_read_mair_el2(void)
 560 {
 561         uint64_t mair_el2;
 562
 563         __asm__ __volatile__("mrs %0, MAIR_EL2\n\t" : "=r" (mair_el2) :  : "memory");
 564
 565         return mair_el2;
 566 }
 567
 568 void raw_write_mair_el2(uint64_t mair_el2)
 569 {
 570         __asm__ __volatile__("msr MAIR_EL2, %0\n\t" : : "r" (mair_el2) : "memory");
 571 }
 572
 573 uint64_t raw_read_mair_el3(void)
 574 {
 575         uint64_t mair_el3;
 576
 577         __asm__ __volatile__("mrs %0, MAIR_EL3\n\t" : "=r" (mair_el3) :  : "memory");
 578
 579         return mair_el3;
 580 }
 581
 582 void raw_write_mair_el3(uint64_t mair_el3)
 583 {
 584         __asm__ __volatile__("msr MAIR_EL3, %0\n\t" : : "r" (mair_el3) : "memory");
 585 }
 586
 587 uint64_t raw_read_mair_current(void)
 588 {
 589         uint32_t el = get_current_el();
 590         return raw_read_mair(el);
 591 }
 592
 593 void raw_write_mair_current(uint64_t mair)
 594 {
 595         uint32_t el = get_current_el();
 596         raw_write_mair(mair, el);
 597 }
 598
 599 uint64_t raw_read_mair(uint32_t el)
 600 {
 601         SWITCH_CASE_READ(raw_read_mair, mair, uint64_t, el);
 602 }
 603
 604 void raw_write_mair(uint64_t mair, uint32_t el)
 605 {
 606         SWITCH_CASE_WRITE(raw_write_mair, mair, el);
 607 }
 608
 609 /* MIDR */
 610 uint32_t raw_read_midr_el1(void)
 611 {
 612         uint32_t midr_el1;
 613
 614         __asm__ __volatile__("mrs %0, MIDR_EL1\n\t" : "=r" (midr_el1) :  : "memory");
 615
 616         return midr_el1;
 617 }
 618
 619 /* MPIDR */
 620 uint64_t raw_read_mpidr_el1(void)
 621 {
 622         uint64_t mpidr_el1;
 623
 624         __asm__ __volatile__("mrs %0, MPIDR_EL1\n\t" : "=r" (mpidr_el1) :  : "memory");
 625
 626         return mpidr_el1;
 627 }
 628
 629 /* RMR */
 630 uint32_t raw_read_rmr_el1(void)
 631 {
 632         uint32_t rmr_el1;
 633
 634         __asm__ __volatile__("mrs %0, RMR_EL1\n\t" : "=r" (rmr_el1) :  : "memory");
 635
 636         return rmr_el1;
 637 }
 638
 639 void raw_write_rmr_el1(uint32_t rmr_el1)
 640 {
 641         __asm__ __volatile__("msr RMR_EL1, %0\n\t" : : "r" (rmr_el1) : "memory");
 642 }
 643
 644 uint32_t raw_read_rmr_el2(void)
 645 {
 646         uint32_t rmr_el2;
 647
 648         __asm__ __volatile__("mrs %0, RMR_EL2\n\t" : "=r" (rmr_el2) :  : "memory");
 649
 650         return rmr_el2;
 651 }
 652
 653 void raw_write_rmr_el2(uint32_t rmr_el2)
 654 {
 655         __asm__ __volatile__("msr RMR_EL2, %0\n\t" : : "r" (rmr_el2) : "memory");
 656 }
 657
 658 uint32_t raw_read_rmr_el3(void)
 659 {
 660         uint32_t rmr_el3;
 661
 662         __asm__ __volatile__("mrs %0, RMR_EL3\n\t" : "=r" (rmr_el3) :  : "memory");
 663
 664         return rmr_el3;
 665 }
 666
 667 void raw_write_rmr_el3(uint32_t rmr_el3)
 668 {
 669         __asm__ __volatile__("msr RMR_EL3, %0\n\t" : : "r" (rmr_el3) : "memory");
 670 }
 671
 672 uint32_t raw_read_rmr_current(void)
 673 {
 674         uint32_t el = get_current_el();
 675         return raw_read_rmr(el);
 676 }
 677
 678 void raw_write_rmr_current(uint32_t rmr)
 679 {
 680         uint32_t el = get_current_el();
 681         raw_write_rmr(rmr, el);
 682 }
 683
 684 uint32_t raw_read_rmr(uint32_t el)
 685 {
 686         SWITCH_CASE_READ(raw_read_rmr, rmr, uint32_t, el);
 687 }
 688
 689 void raw_write_rmr(uint32_t rmr, uint32_t el)
 690 {
 691         SWITCH_CASE_WRITE(raw_write_rmr, rmr, el);
 692 }
 693
 694 /* RVBAR */
 695 uint64_t raw_read_rvbar_el1(void)
 696 {
 697         uint64_t rvbar_el1;
 698
 699         __asm__ __volatile__("mrs %0, RVBAR_EL1\n\t" : "=r" (rvbar_el1) :  : "memory");
 700
 701         return rvbar_el1;
 702 }
 703
 704 void raw_write_rvbar_el1(uint64_t rvbar_el1)
 705 {
 706         __asm__ __volatile__("msr RVBAR_EL1, %0\n\t" : : "r" (rvbar_el1) : "memory");
 707 }
 708
 709 uint64_t raw_read_rvbar_el2(void)
 710 {
 711         uint64_t rvbar_el2;
 712
 713         __asm__ __volatile__("mrs %0, RVBAR_EL2\n\t" : "=r" (rvbar_el2) :  : "memory");
 714
 715         return rvbar_el2;
 716 }
 717
 718 void raw_write_rvbar_el2(uint64_t rvbar_el2)
 719 {
 720         __asm__ __volatile__("msr RVBAR_EL2, %0\n\t" : : "r" (rvbar_el2) : "memory");
 721 }
 722
 723 uint64_t raw_read_rvbar_el3(void)
 724 {
 725         uint64_t rvbar_el3;
 726
 727         __asm__ __volatile__("mrs %0, RVBAR_EL3\n\t" : "=r" (rvbar_el3) :  : "memory");
 728
 729         return rvbar_el3;
 730 }
 731
 732 void raw_write_rvbar_el3(uint64_t rvbar_el3)
 733 {
 734         __asm__ __volatile__("msr RVBAR_EL3, %0\n\t" : : "r" (rvbar_el3) : "memory");
 735 }
 736
 737 uint64_t raw_read_rvbar_current(void)
 738 {
 739         uint32_t el = get_current_el();
 740         return raw_read_rvbar(el);
 741 }
 742
 743 void raw_write_rvbar_current(uint64_t rvbar)
 744 {
 745         uint32_t el = get_current_el();
 746         raw_write_rvbar(rvbar, el);
 747 }
 748
 749 uint64_t raw_read_rvbar(uint32_t el)
 750 {
 751         SWITCH_CASE_READ(raw_read_rvbar, rvbar, uint64_t, el);
 752 }
 753
 754 void raw_write_rvbar(uint64_t rvbar, uint32_t el)
 755 {
 756         SWITCH_CASE_WRITE(raw_write_rvbar, rvbar, el);
 757 }
 758
 759 /* Scr */
 760 uint32_t raw_read_scr_el3(void)
 761 {
 762         uint32_t scr_el3;
 763
 764         __asm__ __volatile__("mrs %0, SCR_EL3\n\t" : "=r" (scr_el3) :  : "memory");
 765
 766         return scr_el3;
 767 }
 768
 769 void raw_write_scr_el3(uint32_t scr_el3)
 770 {
 771         __asm__ __volatile__("msr SCR_EL3, %0\n\t" : : "r" (scr_el3) : "memory");
 772 }
 773
 774 /* SCTLR */
 775 uint32_t raw_read_sctlr_el1(void)
 776 {
 777         uint32_t sctlr_el1;
 778
 779         __asm__ __volatile__("mrs %0, SCTLR_EL1\n\t" : "=r" (sctlr_el1) :  : "memory");
 780
 781         return sctlr_el1;
 782 }
 783
 784 void raw_write_sctlr_el1(uint32_t sctlr_el1)
 785 {
 786         __asm__ __volatile__("msr SCTLR_EL1, %0\n\t" : : "r" (sctlr_el1) : "memory");
 787 }
 788
 789 uint32_t raw_read_sctlr_el2(void)
 790 {
 791         uint32_t sctlr_el2;
 792
 793         __asm__ __volatile__("mrs %0, SCTLR_EL2\n\t" : "=r" (sctlr_el2) :  : "memory");
 794
 795         return sctlr_el2;
 796 }
 797
 798 void raw_write_sctlr_el2(uint32_t sctlr_el2)
 799 {
 800         __asm__ __volatile__("msr SCTLR_EL2, %0\n\t" : : "r" (sctlr_el2) : "memory");
 801 }
 802
 803 uint32_t raw_read_sctlr_el3(void)
 804 {
 805         uint32_t sctlr_el3;
 806
 807         __asm__ __volatile__("mrs %0, SCTLR_EL3\n\t" : "=r" (sctlr_el3) :  : "memory");
 808
 809         return sctlr_el3;
 810 }
 811
 812 void raw_write_sctlr_el3(uint32_t sctlr_el3)
 813 {
 814         __asm__ __volatile__("msr SCTLR_EL3, %0\n\t" : : "r" (sctlr_el3) : "memory");
 815 }
 816
 817 uint32_t raw_read_sctlr_current(void)
 818 {
 819         uint32_t el = get_current_el();
 820         return raw_read_sctlr(el);
 821 }
 822
 823 void raw_write_sctlr_current(uint32_t sctlr)
 824 {
 825         uint32_t el = get_current_el();
 826         raw_write_sctlr(sctlr, el);
 827 }
 828
 829 uint32_t raw_read_sctlr(uint32_t el)
 830 {
 831         SWITCH_CASE_READ(raw_read_sctlr, sctlr, uint32_t, el);
 832 }
 833
 834 void raw_write_sctlr(uint32_t sctlr, uint32_t el)
 835 {
 836         SWITCH_CASE_WRITE(raw_write_sctlr, sctlr, el);
 837 }
 838
 839 /* TCR */
 840 uint64_t raw_read_tcr_el1(void)
 841 {
 842         uint64_t tcr_el1;
 843
 844         __asm__ __volatile__("mrs %0, TCR_EL1\n\t" : "=r" (tcr_el1) :  : "memory");
 845
 846         return tcr_el1;
 847 }
 848
 849 void raw_write_tcr_el1(uint64_t tcr_el1)
 850 {
 851         __asm__ __volatile__("msr TCR_EL1, %0\n\t" : : "r" (tcr_el1) : "memory");
 852 }
 853
 854 uint32_t raw_read_tcr_el2(void)
 855 {
 856         uint32_t tcr_el2;
 857
 858         __asm__ __volatile__("mrs %0, TCR_EL2\n\t" : "=r" (tcr_el2) :  : "memory");
 859
 860         return tcr_el2;
 861 }
 862
 863 void raw_write_tcr_el2(uint32_t tcr_el2)
 864 {
 865         __asm__ __volatile__("msr TCR_EL2, %0\n\t" : : "r" (tcr_el2) : "memory");
 866 }
 867
 868 uint32_t raw_read_tcr_el3(void)
 869 {
 870         uint32_t tcr_el3;
 871
 872         __asm__ __volatile__("mrs %0, TCR_EL3\n\t" : "=r" (tcr_el3) :  : "memory");
 873
 874         return tcr_el3;
 875 }
 876
 877 void raw_write_tcr_el3(uint32_t tcr_el3)
 878 {
 879         __asm__ __volatile__("msr TCR_EL3, %0\n\t" : : "r" (tcr_el3) : "memory");
 880 }
 881
 882 /* TTBR0 */
 883 uint64_t raw_read_ttbr0_el1(void)
 884 {
 885         uint64_t ttbr0_el1;
 886
 887         __asm__ __volatile__("mrs %0, TTBR0_EL1\n\t" : "=r" (ttbr0_el1) :  : "memory");
 888
 889         return ttbr0_el1;
 890 }
 891
 892 void raw_write_ttbr0_el1(uint64_t ttbr0_el1)
 893 {
 894         __asm__ __volatile__("msr TTBR0_EL1, %0\n\t" : : "r" (ttbr0_el1) : "memory");
 895 }
 896
 897 uint64_t raw_read_ttbr0_el2(void)
 898 {
 899         uint64_t ttbr0_el2;
 900
 901         __asm__ __volatile__("mrs %0, TTBR0_EL2\n\t" : "=r" (ttbr0_el2) :  : "memory");
 902
 903         return ttbr0_el2;
 904 }
 905
 906 void raw_write_ttbr0_el2(uint64_t ttbr0_el2)
 907 {
 908         __asm__ __volatile__("msr TTBR0_EL2, %0\n\t" : : "r" (ttbr0_el2) : "memory");
 909 }
 910
 911 uint64_t raw_read_ttbr0_el3(void)
 912 {
 913         uint64_t ttbr0_el3;
 914
 915         __asm__ __volatile__("mrs %0, TTBR0_EL3\n\t" : "=r" (ttbr0_el3) :  : "memory");
 916
 917         return ttbr0_el3;
 918 }
 919
 920 void raw_write_ttbr0_el3(uint64_t ttbr0_el3)
 921 {
 922         __asm__ __volatile__("msr TTBR0_EL3, %0\n\t" : : "r" (ttbr0_el3) : "memory");
 923 }
 924
 925 uint64_t raw_read_ttbr0_current(void)
 926 {
 927         uint32_t el = get_current_el();
 928         return raw_read_ttbr0(el);
 929 }
 930
 931 void raw_write_ttbr0_current(uint64_t ttbr0)
 932 {
 933         uint32_t el = get_current_el();
 934         raw_write_ttbr0(ttbr0, el);
 935 }
 936
 937 uint64_t raw_read_ttbr0(uint32_t el)
 938 {
 939         SWITCH_CASE_READ(raw_read_ttbr0, ttbr0, uint64_t, el);
 940 }
 941
 942 void raw_write_ttbr0(uint64_t ttbr0, uint32_t el)
 943 {
 944         SWITCH_CASE_WRITE(raw_write_ttbr0, ttbr0, el);
 945 }
 946
 947 /* TTBR1 */
 948 uint64_t raw_read_ttbr1_el1(void)
 949 {
 950         uint64_t ttbr1_el1;
 951
 952         __asm__ __volatile__("mrs %0, TTBR1_EL1\n\t" : "=r" (ttbr1_el1) :  : "memory");
 953
 954         return ttbr1_el1;
 955 }
 956
 957 void raw_write_ttbr1_el1(uint64_t ttbr1_el1)
 958 {
 959         __asm__ __volatile__("msr TTBR1_EL1, %0\n\t" : : "r" (ttbr1_el1) : "memory");
 960 }
 961
 962 /* VBAR */
 963 uint64_t raw_read_vbar_el1(void)
 964 {
 965         uint64_t vbar_el1;
 966
 967         __asm__ __volatile__("mrs %0, VBAR_EL1\n\t" : "=r" (vbar_el1) :  : "memory");
 968
 969         return vbar_el1;
 970 }
 971
 972 void raw_write_vbar_el1(uint64_t vbar_el1)
 973 {
 974         __asm__ __volatile__("msr VBAR_EL1, %0\n\t" : : "r" (vbar_el1) : "memory");
 975 }
 976
 977 uint64_t raw_read_vbar_el2(void)
 978 {
 979         uint64_t vbar_el2;
 980
 981         __asm__ __volatile__("mrs %0, VBAR_EL2\n\t" : "=r" (vbar_el2) :  : "memory");
 982
 983         return vbar_el2;
 984 }
 985
 986 void raw_write_vbar_el2(uint64_t vbar_el2)
 987 {
 988         __asm__ __volatile__("msr VBAR_EL2, %0\n\t" : : "r" (vbar_el2) : "memory");
 989 }
 990
 991 uint64_t raw_read_vbar_el3(void)
 992 {
 993         uint64_t vbar_el3;
 994
 995         __asm__ __volatile__("mrs %0, VBAR_EL3\n\t" : "=r" (vbar_el3) :  : "memory");
 996
 997         return vbar_el3;
 998 }
 999
1000 void raw_write_vbar_el3(uint64_t vbar_el3)
1001 {
1002         __asm__ __volatile__("msr VBAR_EL3, %0\n\t" : : "r" (vbar_el3) : "memory");
1003 }
1004
1005 uint64_t raw_read_vbar_current(void)
1006 {
1007         uint32_t el = get_current_el();
1008         return raw_read_vbar(el);
1009 }
1010
1011 void raw_write_vbar_current(uint64_t vbar)
1012 {
1013         uint32_t el = get_current_el();
1014         raw_write_vbar(vbar, el);
1015 }
1016
1017 uint64_t raw_read_vbar(uint32_t el)
1018 {
1019         SWITCH_CASE_READ(raw_read_vbar, vbar, uint64_t, el);
1020 }
1021
1022 void raw_write_vbar(uint64_t vbar, uint32_t el)
1023 {
1024         SWITCH_CASE_WRITE(raw_write_vbar, vbar, el);
1025 }