src/soc/intel/alderlake/espi.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 /*
   4  * This file is created based on Intel Alder Lake Processor PCH Datasheet
   5  * Document number: 621483
   6  * Chapter number: 2
   7  */
   8
   9 #include <device/pci.h>
  10 #include <pc80/isa-dma.h>
  11 #include <pc80/i8259.h>
  12 #include <arch/ioapic.h>
  13 #include <intelblocks/itss.h>
  14 #include <intelblocks/lpc_lib.h>
  15 #include <intelblocks/pcr.h>
  16 #include <soc/espi.h>
  17 #include <soc/iomap.h>
  18 #include <soc/irq.h>
  19 #include <soc/pci_devs.h>
  20 #include <soc/pcr_ids.h>
  21 #include <soc/soc_chip.h>
  22
  23 void soc_get_gen_io_dec_range(uint32_t gen_io_dec[LPC_NUM_GENERIC_IO_RANGES])
  24 {
  25         const config_t *config = config_of_soc();
  26
  27         gen_io_dec[0] = config->gen1_dec;
  28         gen_io_dec[1] = config->gen2_dec;
  29         gen_io_dec[2] = config->gen3_dec;
  30         gen_io_dec[3] = config->gen4_dec;
  31 }
  32
  33 #if ENV_RAMSTAGE
  34 void lpc_soc_init(struct device *dev)
  35 {
  36         /* Legacy initialization */
  37         isa_dma_init();
  38         pch_misc_init();
  39
  40         /* Enable CLKRUN_EN for power gating ESPI */
  41         lpc_enable_pci_clk_cntl();
  42
  43         /* Set ESPI Serial IRQ mode */
  44         if (CONFIG(SERIRQ_CONTINUOUS_MODE))
  45                 lpc_set_serirq_mode(SERIRQ_CONTINUOUS);
  46         else
  47                 lpc_set_serirq_mode(SERIRQ_QUIET);
  48
  49         /* Interrupt configuration */
  50         pch_enable_ioapic();
  51         pch_pirq_init();
  52         setup_i8259();
  53         i8259_configure_irq_trigger(9, 1);
  54 }
  55 #endif