2 * This file is part of the coreboot project.
4 * Copyright (C) 2005 AMD
5 * Written by Yinghai Lu <yinghai.lu@amd.com> for AMD.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
19 #define SMBUS_IO_BASE 0x1000
21 static void enable_smbus(void)
24 dev
= pci_locate_device(PCI_ID(0x1166, 0x0205), 0); // 0x0201?
26 if (dev
== PCI_DEV_INVALID
) {
27 die("SMBUS controller not found\n");
30 printk(BIOS_DEBUG
, "SMBus controller enabled\n");
31 /* set smbus iobase */
32 pci_write_config32(dev
, 0x90, SMBUS_IO_BASE
| 1);
33 /* Set smbus iospace enable */
34 pci_write_config8(dev
, 0xd2, 0x03);
35 /* clear any lingering errors, so the transaction will run */
36 outb(inb(SMBUS_IO_BASE
+ SMBHSTSTAT
), SMBUS_IO_BASE
+ SMBHSTSTAT
);
39 static inline int smbus_recv_byte(unsigned device
)
41 return do_smbus_recv_byte(SMBUS_IO_BASE
, device
);
44 static inline int smbus_send_byte(unsigned device
, unsigned char val
)
46 return do_smbus_send_byte(SMBUS_IO_BASE
, device
, val
);
49 static inline int smbus_read_byte(unsigned device
, unsigned address
)
51 return do_smbus_read_byte(SMBUS_IO_BASE
, device
, address
);
54 static inline int smbus_write_byte(unsigned device
, unsigned address
, unsigned char val
)
56 return do_smbus_write_byte(SMBUS_IO_BASE
, device
, address
, val
);