src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb

   1 chip soc/intel/apollolake
   2
   3         device cpu_cluster 0 on
   4                 device lapic 0 on end
   5         end
   6
   7         register "sci_irq" = "SCIS_IRQ10"
   8         register "serirq_mode" = "SERIRQ_CONTINUOUS"
   9
  10         # Disable all clkreq of PCIe root ports as SMARC interface do not
  11         # have this pins.
  12         register "pcie_rp_clkreq_pin[0]" = "CLKREQ_DISABLED"
  13         register "pcie_rp_clkreq_pin[1]" = "CLKREQ_DISABLED"
  14         register "pcie_rp_clkreq_pin[2]" = "CLKREQ_DISABLED"
  15         register "pcie_rp_clkreq_pin[3]" = "CLKREQ_DISABLED"
  16         register "pcie_rp_clkreq_pin[4]" = "CLKREQ_DISABLED"
  17         register "pcie_rp_clkreq_pin[5]" = "CLKREQ_DISABLED"
  18
  19         # EMMC TX DATA Delay 1
  20         # Refer to EDS-Vol2-22.3.
  21         # [14:8] steps of delay for HS400, each 125ps.
  22         # [6:0] steps of delay for SDR104/HS200, each 125ps.
  23         register "emmc_tx_data_cntl1" = "0x0C16"
  24
  25         # EMMC TX DATA Delay 2
  26         # Refer to EDS-Vol2-22.3.
  27         # [30:24] steps of delay for SDR50, each 125ps.
  28         # [22:16] steps of delay for DDR50, each 125ps.
  29         # [14:8] steps of delay for SDR25/HS50, each 125ps.
  30         # [6:0] steps of delay for SDR12, each 125ps.
  31         register "emmc_tx_data_cntl2" = "0x28162828"
  32
  33         # EMMC RX CMD/DATA Delay 1
  34         # Refer to EDS-Vol2-22.3.
  35         # [30:24] steps of delay for SDR50, each 125ps.
  36         # [22:16] steps of delay for DDR50, each 125ps.
  37         # [14:8] steps of delay for SDR25/HS50, each 125ps.
  38         # [6:0] steps of delay for SDR12, each 125ps.
  39         register "emmc_rx_cmd_data_cntl1" = "0x00181717"
  40
  41         # EMMC RX CMD/DATA Delay 2
  42         # Refer to EDS-Vol2-22.3.
  43         # [17:16] stands for Rx Clock before Output Buffer
  44         # [14:8] steps of delay for Auto Tuning Mode, each 125ps.
  45         # [6:0] steps of delay for HS200, each 125ps.
  46         register "emmc_rx_cmd_data_cntl2" = "0x10008"
  47
  48         # 0:HS400(Default), 1:HS200, 2:DDR50
  49         register "emmc_host_max_speed" = "2"
  50
  51         device domain 0 on
  52                 device pci 00.0 on  end # - Host Bridge
  53                 device pci 00.1 off end # - DPTF
  54                 device pci 00.2 off end # - NPK
  55                 device pci 02.0 on  end # - Gen - Display
  56                 device pci 03.0 off end # - Iunit
  57                 device pci 0d.0 on  end # - P2SB
  58                 device pci 0d.1 off end # - PMC
  59                 device pci 0d.2 on  end # - SPI
  60                 device pci 0d.3 off end # - Shared SRAM
  61                 device pci 0e.0 off end # - Audio
  62                 device pci 11.0 on  end # - ISH
  63                 device pci 12.0 on  end # - SATA
  64                 device pci 13.0 on  end # - RP 2 - PCIe A 0
  65                 device pci 13.1 on  end # - RP 3 - PCIe A 1
  66                 device pci 13.2 on  end # - RP 4 - PCIe-A 2
  67                 device pci 13.3 on  end # - RP 5 - PCIe-A 3
  68                 device pci 14.0 on  end # - RP 0 - PCIe-B 0
  69                 device pci 14.1 on  end # - RP 1 - PCIe-B 1
  70                 device pci 15.0 on  end # - XHCI
  71                 device pci 15.1 off end # - XDCI
  72                 device pci 16.0 on      # - I2C 0
  73                         # Enable external RTC chip
  74                         chip drivers/i2c/rx6110sa
  75                                 register "pmon_sampling" = "PMON_SAMPL_256_MS"
  76                                 register "bks_on" = "0"
  77                                 register "bks_off" = "1"
  78                                 register "iocut_en" = "1"
  79                                 register "set_user_date" = "1"
  80                                 register "user_year" = "04"
  81                                 register "user_month" = "07"
  82                                 register "user_day" = "01"
  83                                 register "user_weekday" = "4"
  84                                 device i2c 0x32 on end  # RTC RX6110 SA
  85                         end
  86                 end
  87                 device pci 16.1 on  end # - I2C 1
  88                 device pci 16.2 on  end # - I2C 2
  89                 device pci 16.3 on  end # - I2C 3
  90                 device pci 17.0 on  end # - I2C 4
  91                 device pci 17.1 on  end # - I2C 5
  92                 device pci 17.2 on  end # - I2C 6
  93                 device pci 17.3 on  end # - I2C 7
  94                 device pci 18.0 on  end # - UART 0
  95                 device pci 18.1 on  end # - UART 1
  96                 device pci 18.2 on  end # - UART 2
  97                 device pci 18.3 on  end # - UART 3
  98                 device pci 19.0 off end # - SPI 0
  99                 device pci 19.1 off end # - SPI 1
 100                 device pci 19.2 off end # - SPI 2
 101                 device pci 1a.0 off end # - PWM
 102                 device pci 1b.0 on  end # - SDCARD
 103                 device pci 1c.0 on  end # - eMMC
 104                 device pci 1d.0 off end # - UFS
 105                 device pci 1e.0 off end # - SDIO
 106                 device pci 1f.0 on  end # - LPC
 107                 device pci 1f.0 on      # - LPC
 108                         chip drivers/pc80/tpm
 109                                 device pnp 0c31.0 on end
 110                         end
 111                 end
 112                 device pci 1f.1 on  end # - SMBUS
 113         end
 114 end