src/mainboard/lenovo/x220/dsdt.asl

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2007-2009 coresystems GmbH
   5  * Copyright (C) 2011 The ChromiumOS Authors.  All rights reserved.
   6  * Copyright (C) 2014 Vladimir Serbinenko
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; version 2 of the License.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc.
  20  */
  21
  22 #define THINKPAD_EC_GPE 17
  23 #define BRIGHTNESS_UP \_SB.PCI0.GFX0.INCB
  24 #define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.DECB
  25 #define ACPI_VIDEO_DEVICE \_SB.PCI0.GFX0
  26 #define EC_LENOVO_H8_ME_WORKAROUND 1
  27
  28 DefinitionBlock(
  29         "dsdt.aml",
  30         "DSDT",
  31         0x02,           // DSDT revision: ACPI v2.0
  32         "COREv4",       // OEM id
  33         "COREBOOT",     // OEM table id
  34         0x20110725      // OEM revision
  35 )
  36 {
  37         #include <southbridge/intel/bd82x6x/acpi/platform.asl>
  38
  39         // Some generic macros
  40         #include "acpi/platform.asl"
  41
  42         // global NVS and variables
  43         #include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
  44
  45         #include <cpu/intel/model_206ax/acpi/cpu.asl>
  46
  47         Scope (\_SB) {
  48                 Device (PCI0)
  49                 {
  50                         #include <northbridge/intel/sandybridge/acpi/sandybridge.asl>
  51                         #include <southbridge/intel/bd82x6x/acpi/pch.asl>
  52                 }
  53         }
  54
  55         /* Chipset specific sleep states */
  56         #include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
  57 }