2 * This file is part of the coreboot project.
4 * Copyright 2016 Google Inc.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
19 0x05, // DSDT revision: ACPI v5.0
21 "COREBOOT", // OEM table id
22 0x20110725 // OEM revision
25 /* global NVS and variables */
26 #include <soc/intel/apollolake/acpi/globalnvs.asl>
29 #include <soc/intel/apollolake/acpi/cpu.asl>
34 #include <soc/intel/apollolake/acpi/northbridge.asl>
35 #include <soc/intel/apollolake/acpi/southbridge.asl>
36 #include <soc/intel/apollolake/acpi/pch_hda.asl>
40 /* Chipset specific sleep states */
41 #include <soc/intel/apollolake/acpi/sleepstates.asl>