src/mainboard/siemens/mc_apl1/devicetree.cb

   1 chip soc/intel/apollolake
   2
   3         device cpu_cluster 0 on
   4                 device lapic 0 on end
   5         end
   6
   7         # Disable unused clkreq of PCIe root ports
   8         register "pcie_rp0_clkreq_pin" = "3" # PCIe-PCI-Bridge
   9         register "pcie_rp1_clkreq_pin" = "CLKREQ_DISABLED"
  10         register "pcie_rp2_clkreq_pin" = "0" # MACPHY
  11         register "pcie_rp3_clkreq_pin" = "1" # MACPHY
  12         register "pcie_rp4_clkreq_pin" = "CLKREQ_DISABLED"
  13         register "pcie_rp5_clkreq_pin" = "CLKREQ_DISABLED"
  14
  15         # EMMC TX DATA Delay 1
  16         # Refer to EDS-Vol2-22.3.
  17         # [14:8] steps of delay for HS400, each 125ps.
  18         # [6:0] steps of delay for SDR104/HS200, each 125ps.
  19         register "emmc_tx_data_cntl1" = "0x0C16"
  20
  21         # EMMC TX DATA Delay 2
  22         # Refer to EDS-Vol2-22.3.
  23         # [30:24] steps of delay for SDR50, each 125ps.
  24         # [22:16] steps of delay for DDR50, each 125ps.
  25         # [14:8] steps of delay for SDR25/HS50, each 125ps.
  26         # [6:0] steps of delay for SDR12, each 125ps.
  27         register "emmc_tx_data_cntl2" = "0x28162828"
  28
  29         # EMMC RX CMD/DATA Delay 1
  30         # Refer to EDS-Vol2-22.3.
  31         # [30:24] steps of delay for SDR50, each 125ps.
  32         # [22:16] steps of delay for DDR50, each 125ps.
  33         # [14:8] steps of delay for SDR25/HS50, each 125ps.
  34         # [6:0] steps of delay for SDR12, each 125ps.
  35         register "emmc_rx_cmd_data_cntl1" = "0x00181717"
  36
  37         # EMMC RX CMD/DATA Delay 2
  38         # Refer to EDS-Vol2-22.3.
  39         # [17:16] stands for Rx Clock before Output Buffer
  40         # [14:8] steps of delay for Auto Tuning Mode, each 125ps.
  41         # [6:0] steps of delay for HS200, each 125ps.
  42         register "emmc_rx_cmd_data_cntl2" = "0x10008"
  43
  44         device domain 0 on
  45                 device pci 00.0 on  end # - Host Bridge
  46                 device pci 00.1 off end # - DPTF
  47                 device pci 00.2 off end # - NPK
  48                 device pci 02.0 on  end # - Gen - Display
  49                 device pci 03.0 off end # - Iunit
  50                 device pci 0d.0 on  end # - P2SB
  51                 device pci 0d.1 off end # - PMC
  52                 device pci 0d.2 on  end # - SPI
  53                 device pci 0d.3 off end # - Shared SRAM
  54                 device pci 0e.0 off end # - Audio
  55                 device pci 11.0 on  end # - ISH
  56                 device pci 12.0 on  end # - SATA
  57                 device pci 13.0 on  end # - RP 2 - PCIe A 0 - MACPHY
  58                 device pci 13.1 on  end # - RP 3 - PCIe A 1 - MACPHY
  59                 device pci 13.2 off end # - RP 4 - PCIe-A 2
  60                 device pci 13.3 off end # - RP 5 - PCIe-A 3
  61                 device pci 14.0 on  end # - RP 0 - PCIe-B 0 - PCIe-PCI-Bridge
  62                 device pci 14.1 off end # - RP 1 - PCIe-B 1
  63                 device pci 15.0 on  end # - XHCI
  64                 device pci 15.1 off end # - XDCI
  65                 device pci 16.0 on      # - I2C 0
  66                         # Enable external RTC chip
  67                         chip drivers/i2c/rx6110sa
  68                                 register "cof_selection" = "0"
  69                                 register "set_user_date" = "1"
  70                                 register "user_year" = "04"
  71                                 register "user_month" = "07"
  72                                 register "user_day" = "01"
  73                                 register "user_weekday" = "4"
  74                                 device i2c 0x32 on end  # RTC RX6110 SA
  75                         end
  76                 end
  77                 device pci 16.1 off end # - I2C 1
  78                 device pci 16.2 off end # - I2C 2
  79                 device pci 16.3 off end # - I2C 3
  80                 device pci 17.0 off end # - I2C 4
  81                 device pci 17.1 off end # - I2C 5
  82                 device pci 17.2 off end # - I2C 6
  83                 device pci 17.3 on  end # - I2C 7
  84                 device pci 18.0 on  end # - UART 0
  85                 device pci 18.1 on  end # - UART 1
  86                 device pci 18.2 on  end # - UART 2
  87                 device pci 18.3 on  end # - UART 3
  88                 device pci 19.0 off end # - SPI 0
  89                 device pci 19.1 off end # - SPI 1
  90                 device pci 19.2 off end # - SPI 2
  91                 device pci 1a.0 off end # - PWM
  92                 device pci 1b.0 on  end # - SDCARD
  93                 device pci 1c.0 on  end # - eMMC
  94                 device pci 1d.0 off end # - UFS
  95                 device pci 1e.0 off end # - SDIO
  96                 device pci 1f.0 on  end # - LPC
  97                 device pci 1f.1 on  end # - SMBUS
  98         end
  99 end