SMBIOS: Introduce `smbios_carve_table` function
[coreboot.git] / src / arch / x86 / smbios.c
blob8e780fd0885c4d16af33861556afb20e766027f4
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <assert.h>
4 #include <string.h>
5 #include <smbios.h>
6 #include <console/console.h>
7 #include <version.h>
8 #include <device/device.h>
9 #include <device/dram/spd.h>
10 #include <arch/cpu.h>
11 #include <cpu/x86/name.h>
12 #include <elog.h>
13 #include <endian.h>
14 #include <memory_info.h>
15 #include <spd.h>
16 #include <cbmem.h>
17 #include <commonlib/helpers.h>
18 #include <device/pci_ids.h>
19 #include <device/pci_def.h>
20 #include <device/pci.h>
21 #include <drivers/vpd/vpd.h>
22 #include <stdlib.h>
24 #define update_max(len, max_len, stmt) \
25 do { \
26 int tmp = stmt; \
28 max_len = MAX(max_len, tmp); \
29 len += tmp; \
30 } while (0)
32 static u8 smbios_checksum(u8 *p, u32 length)
34 u8 ret = 0;
35 while (length--)
36 ret += *p++;
37 return -ret;
40 /* Get the device type 41 from the dev struct */
41 static u8 smbios_get_device_type_from_dev(struct device *dev)
43 u16 pci_basesubclass = (dev->class >> 8) & 0xFFFF;
45 switch (pci_basesubclass) {
46 case PCI_CLASS_NOT_DEFINED:
47 return SMBIOS_DEVICE_TYPE_OTHER;
48 case PCI_CLASS_DISPLAY_VGA:
49 case PCI_CLASS_DISPLAY_XGA:
50 case PCI_CLASS_DISPLAY_3D:
51 case PCI_CLASS_DISPLAY_OTHER:
52 return SMBIOS_DEVICE_TYPE_VIDEO;
53 case PCI_CLASS_STORAGE_SCSI:
54 return SMBIOS_DEVICE_TYPE_SCSI;
55 case PCI_CLASS_NETWORK_ETHERNET:
56 return SMBIOS_DEVICE_TYPE_ETHERNET;
57 case PCI_CLASS_NETWORK_TOKEN_RING:
58 return SMBIOS_DEVICE_TYPE_TOKEN_RING;
59 case PCI_CLASS_MULTIMEDIA_VIDEO:
60 case PCI_CLASS_MULTIMEDIA_AUDIO:
61 case PCI_CLASS_MULTIMEDIA_PHONE:
62 case PCI_CLASS_MULTIMEDIA_OTHER:
63 return SMBIOS_DEVICE_TYPE_SOUND;
64 case PCI_CLASS_STORAGE_ATA:
65 return SMBIOS_DEVICE_TYPE_PATA;
66 case PCI_CLASS_STORAGE_SATA:
67 return SMBIOS_DEVICE_TYPE_SATA;
68 case PCI_CLASS_STORAGE_SAS:
69 return SMBIOS_DEVICE_TYPE_SAS;
70 default:
71 return SMBIOS_DEVICE_TYPE_UNKNOWN;
75 int smbios_add_string(u8 *start, const char *str)
77 int i = 1;
78 char *p = (char *)start;
81 * Return 0 as required for empty strings.
82 * See Section 6.1.3 "Text Strings" of the SMBIOS specification.
84 if (*str == '\0')
85 return 0;
87 for (;;) {
88 if (!*p) {
89 strcpy(p, str);
90 p += strlen(str);
91 *p++ = '\0';
92 *p++ = '\0';
93 return i;
96 if (!strcmp(p, str))
97 return i;
99 p += strlen(p)+1;
100 i++;
104 int smbios_string_table_len(u8 *start)
106 char *p = (char *)start;
107 int i, len = 0;
109 while (*p) {
110 i = strlen(p) + 1;
111 p += i;
112 len += i;
115 if (!len)
116 return 2;
118 return len + 1;
121 void *smbios_carve_table(unsigned long start, u8 type, u8 length, u16 handle)
123 struct smbios_header *t = (struct smbios_header *)start;
125 assert(length >= sizeof(*t));
126 memset(t, 0, length);
127 t->type = type;
128 t->length = length - 2;
129 t->handle = handle;
130 return t;
133 static int smbios_cpu_vendor(u8 *start)
135 if (cpu_have_cpuid()) {
136 u32 tmp[4];
137 const struct cpuid_result res = cpuid(0);
138 tmp[0] = res.ebx;
139 tmp[1] = res.edx;
140 tmp[2] = res.ecx;
141 tmp[3] = 0;
142 return smbios_add_string(start, (const char *)tmp);
143 } else {
144 return smbios_add_string(start, "Unknown");
148 static int smbios_processor_name(u8 *start)
150 u32 tmp[13];
151 const char *str = "Unknown Processor Name";
152 if (cpu_have_cpuid()) {
153 int i;
154 struct cpuid_result res = cpuid(0x80000000);
155 if (res.eax >= 0x80000004) {
156 int j = 0;
157 for (i = 0; i < 3; i++) {
158 res = cpuid(0x80000002 + i);
159 tmp[j++] = res.eax;
160 tmp[j++] = res.ebx;
161 tmp[j++] = res.ecx;
162 tmp[j++] = res.edx;
164 tmp[12] = 0;
165 str = (const char *)tmp;
168 return smbios_add_string(start, str);
171 /* this function will fill the corresponding manufacturer */
172 void smbios_fill_dimm_manufacturer_from_id(uint16_t mod_id, struct smbios_type17 *t)
174 const char *const manufacturer = spd_manufacturer_name(mod_id);
176 if (manufacturer) {
177 t->manufacturer = smbios_add_string(t->eos, manufacturer);
178 } else {
179 char string_buffer[256];
181 snprintf(string_buffer, sizeof(string_buffer), "Unknown (%x)", mod_id);
182 t->manufacturer = smbios_add_string(t->eos, string_buffer);
186 static void trim_trailing_whitespace(char *buffer, size_t buffer_size)
188 size_t len = strnlen(buffer, buffer_size);
190 if (len == 0)
191 return;
193 for (char *p = buffer + len - 1; p >= buffer; --p) {
194 if (*p == ' ')
195 *p = 0;
196 else
197 break;
201 /** This function will fill the corresponding part number */
202 static void smbios_fill_dimm_part_number(const char *part_number, struct smbios_type17 *t)
204 int invalid;
205 size_t i, len;
206 char trimmed_part_number[DIMM_INFO_PART_NUMBER_SIZE];
208 strncpy(trimmed_part_number, part_number, sizeof(trimmed_part_number));
209 trimmed_part_number[sizeof(trimmed_part_number) - 1] = '\0';
212 * SPD mandates that unused characters be represented with a ' '.
213 * We don't want to publish the whitespace in the SMBIOS tables.
215 trim_trailing_whitespace(trimmed_part_number, sizeof(trimmed_part_number));
217 len = strlen(trimmed_part_number);
219 invalid = 0; /* assume valid */
220 for (i = 0; i < len; i++) {
221 if (trimmed_part_number[i] < ' ') {
222 invalid = 1;
223 trimmed_part_number[i] = '*';
227 if (len == 0) {
228 /* Null String in Part Number will have "None" instead. */
229 t->part_number = smbios_add_string(t->eos, "None");
230 } else if (invalid) {
231 char string_buffer[sizeof(trimmed_part_number) + 10];
233 snprintf(string_buffer, sizeof(string_buffer), "Invalid (%s)",
234 trimmed_part_number);
235 t->part_number = smbios_add_string(t->eos, string_buffer);
236 } else {
237 t->part_number = smbios_add_string(t->eos, trimmed_part_number);
241 /* Encodes the SPD serial number into hex */
242 static void smbios_fill_dimm_serial_number(const struct dimm_info *dimm,
243 struct smbios_type17 *t)
245 char serial[9];
247 snprintf(serial, sizeof(serial), "%02hhx%02hhx%02hhx%02hhx",
248 dimm->serial[0], dimm->serial[1], dimm->serial[2], dimm->serial[3]);
250 t->serial_number = smbios_add_string(t->eos, serial);
253 static int create_smbios_type17_for_dimm(struct dimm_info *dimm,
254 unsigned long *current, int *handle,
255 int type16_handle)
257 struct smbios_type17 *t = smbios_carve_table(*current, SMBIOS_MEMORY_DEVICE,
258 sizeof(*t), *handle);
260 t->memory_type = dimm->ddr_type;
261 if (dimm->configured_speed_mts != 0)
262 t->clock_speed = dimm->configured_speed_mts;
263 else
264 t->clock_speed = dimm->ddr_frequency;
265 if (dimm->max_speed_mts != 0)
266 t->speed = dimm->max_speed_mts;
267 else
268 t->speed = dimm->ddr_frequency;
269 if (dimm->dimm_size < 0x7fff) {
270 t->size = dimm->dimm_size;
271 } else {
272 t->size = 0x7fff;
273 t->extended_size = dimm->dimm_size & 0x7fffffff;
275 t->data_width = 8 * (1 << (dimm->bus_width & 0x7));
276 t->total_width = t->data_width + 8 * ((dimm->bus_width & 0x18) >> 3);
278 switch (dimm->mod_type) {
279 case SPD_RDIMM:
280 case SPD_MINI_RDIMM:
281 t->form_factor = MEMORY_FORMFACTOR_RIMM;
282 break;
283 case SPD_UDIMM:
284 case SPD_MICRO_DIMM:
285 case SPD_MINI_UDIMM:
286 t->form_factor = MEMORY_FORMFACTOR_DIMM;
287 break;
288 case SPD_SODIMM:
289 t->form_factor = MEMORY_FORMFACTOR_SODIMM;
290 break;
291 default:
292 t->form_factor = MEMORY_FORMFACTOR_UNKNOWN;
293 break;
296 smbios_fill_dimm_manufacturer_from_id(dimm->mod_id, t);
297 smbios_fill_dimm_serial_number(dimm, t);
298 smbios_fill_dimm_asset_tag(dimm, t);
299 smbios_fill_dimm_locator(dimm, t);
301 /* put '\0' in the end of data */
302 dimm->module_part_number[DIMM_INFO_PART_NUMBER_SIZE - 1] = '\0';
303 smbios_fill_dimm_part_number((char *)dimm->module_part_number, t);
305 /* Voltage Levels */
306 t->configured_voltage = dimm->vdd_voltage;
307 t->minimum_voltage = dimm->vdd_voltage;
308 t->maximum_voltage = dimm->vdd_voltage;
310 /* Fill in type detail */
311 switch (dimm->mod_type) {
312 case SPD_RDIMM:
313 case SPD_MINI_RDIMM:
314 t->type_detail = MEMORY_TYPE_DETAIL_REGISTERED;
315 break;
316 case SPD_UDIMM:
317 case SPD_MINI_UDIMM:
318 t->type_detail = MEMORY_TYPE_DETAIL_UNBUFFERED;
319 break;
320 default:
321 t->type_detail = MEMORY_TYPE_DETAIL_UNKNOWN;
322 break;
324 /* Synchronous = 1 */
325 t->type_detail |= MEMORY_TYPE_DETAIL_SYNCHRONOUS;
326 /* no handle for error information */
327 t->memory_error_information_handle = 0xFFFE;
328 t->attributes = dimm->rank_per_dimm;
329 t->phys_memory_array_handle = type16_handle;
331 *handle += 1;
332 return t->length + smbios_string_table_len(t->eos);
335 #define VERSION_VPD "firmware_version"
336 static const char *vpd_get_bios_version(void)
338 int size;
339 const char *s;
340 char *version;
342 s = vpd_find(VERSION_VPD, &size, VPD_RO);
343 if (!s) {
344 printk(BIOS_ERR, "Find version from VPD %s failed\n", VERSION_VPD);
345 return NULL;
348 version = malloc(size + 1);
349 if (!version) {
350 printk(BIOS_ERR, "Failed to malloc %d bytes for VPD version\n", size + 1);
351 return NULL;
353 memcpy(version, s, size);
354 version[size] = '\0';
355 printk(BIOS_DEBUG, "Firmware version %s from VPD %s\n", version, VERSION_VPD);
356 return version;
359 static const char *get_bios_version(void)
361 const char *s;
363 #define SPACES \
366 if (CONFIG(CHROMEOS))
367 return SPACES;
369 if (CONFIG(VPD_SMBIOS_VERSION)) {
370 s = vpd_get_bios_version();
371 if (s != NULL)
372 return s;
375 s = smbios_mainboard_bios_version();
376 if (s != NULL)
377 return s;
379 if (strlen(CONFIG_LOCALVERSION) != 0) {
380 printk(BIOS_DEBUG, "BIOS version set to CONFIG_LOCALVERSION: '%s'\n",
381 CONFIG_LOCALVERSION);
382 return CONFIG_LOCALVERSION;
385 printk(BIOS_DEBUG, "SMBIOS firmware version is set to coreboot_version: '%s'\n",
386 coreboot_version);
387 return coreboot_version;
390 static int smbios_write_type0(unsigned long *current, int handle)
392 struct smbios_type0 *t = smbios_carve_table(*current, SMBIOS_BIOS_INFORMATION,
393 sizeof(*t), handle);
395 t->vendor = smbios_add_string(t->eos, "coreboot");
396 t->bios_release_date = smbios_add_string(t->eos, coreboot_dmi_date);
398 if (CONFIG(CHROMEOS_NVS)) {
399 uintptr_t version_address = (uintptr_t)t->eos;
400 /* SMBIOS offsets start at 1 rather than 0 */
401 version_address += (u32)smbios_string_table_len(t->eos) - 1;
402 smbios_type0_bios_version(version_address);
404 t->bios_version = smbios_add_string(t->eos, get_bios_version());
405 uint32_t rom_size = CONFIG_ROM_SIZE;
406 rom_size = MIN(CONFIG_ROM_SIZE, 16 * MiB);
407 t->bios_rom_size = (rom_size / 65535) - 1;
409 if (CONFIG_ROM_SIZE >= 1 * GiB) {
410 t->extended_bios_rom_size = DIV_ROUND_UP(CONFIG_ROM_SIZE, GiB) | (1 << 14);
411 } else {
412 t->extended_bios_rom_size = DIV_ROUND_UP(CONFIG_ROM_SIZE, MiB);
415 t->system_bios_major_release = coreboot_major_revision;
416 t->system_bios_minor_release = coreboot_minor_revision;
418 smbios_ec_revision(&t->ec_major_release, &t->ec_minor_release);
420 t->bios_characteristics =
421 BIOS_CHARACTERISTICS_PCI_SUPPORTED |
422 BIOS_CHARACTERISTICS_SELECTABLE_BOOT |
423 BIOS_CHARACTERISTICS_UPGRADEABLE;
425 if (CONFIG(CARDBUS_PLUGIN_SUPPORT))
426 t->bios_characteristics |= BIOS_CHARACTERISTICS_PC_CARD;
428 if (CONFIG(HAVE_ACPI_TABLES))
429 t->bios_characteristics_ext1 = BIOS_EXT1_CHARACTERISTICS_ACPI;
431 t->bios_characteristics_ext2 = BIOS_EXT2_CHARACTERISTICS_TARGET;
432 const int len = t->length + smbios_string_table_len(t->eos);
433 *current += len;
434 return len;
437 static int get_socket_type(void)
439 if (CONFIG(CPU_INTEL_SLOT_1))
440 return 0x08;
441 if (CONFIG(CPU_INTEL_SOCKET_MPGA604))
442 return 0x13;
443 if (CONFIG(CPU_INTEL_SOCKET_LGA775))
444 return 0x15;
445 if (CONFIG(XEON_SP_COMMON_BASE))
446 return 0x36;
448 return 0x02; /* Unknown */
451 unsigned int __weak smbios_processor_external_clock(void)
453 return 0; /* Unknown */
456 unsigned int __weak smbios_processor_characteristics(void)
458 return 0;
461 unsigned int __weak smbios_processor_family(struct cpuid_result res)
463 return (res.eax > 0) ? 0x0c : 0x6;
466 unsigned int __weak smbios_cache_error_correction_type(u8 level)
468 return SMBIOS_CACHE_ERROR_CORRECTION_UNKNOWN;
471 unsigned int __weak smbios_cache_sram_type(void)
473 return SMBIOS_CACHE_SRAM_TYPE_UNKNOWN;
476 unsigned int __weak smbios_cache_conf_operation_mode(u8 level)
478 return SMBIOS_CACHE_OP_MODE_UNKNOWN; /* Unknown */
481 /* Returns the processor voltage in 100mV units */
482 unsigned int __weak smbios_cpu_get_voltage(void)
484 return 0; /* Unknown */
487 static size_t get_number_of_caches(struct cpuid_result res_deterministic_cache)
489 size_t max_logical_cpus_sharing_cache = 0;
490 size_t number_of_cpus_per_package = 0;
491 size_t max_logical_cpus_per_package = 0;
492 struct cpuid_result res;
494 if (!cpu_have_cpuid())
495 return 1;
497 res = cpuid(1);
499 max_logical_cpus_per_package = (res.ebx >> 16) & 0xff;
501 max_logical_cpus_sharing_cache = ((res_deterministic_cache.eax >> 14) & 0xfff) + 1;
503 /* Check if it's last level cache */
504 if (max_logical_cpus_sharing_cache == max_logical_cpus_per_package)
505 return 1;
507 if (cpuid_get_max_func() >= 0xb) {
508 res = cpuid_ext(0xb, 1);
509 number_of_cpus_per_package = res.ebx & 0xff;
510 } else {
511 number_of_cpus_per_package = max_logical_cpus_per_package;
514 return number_of_cpus_per_package / max_logical_cpus_sharing_cache;
517 static int smbios_write_type1(unsigned long *current, int handle)
519 struct smbios_type1 *t = smbios_carve_table(*current, SMBIOS_SYSTEM_INFORMATION,
520 sizeof(*t), handle);
522 t->manufacturer = smbios_add_string(t->eos, smbios_system_manufacturer());
523 t->product_name = smbios_add_string(t->eos, smbios_system_product_name());
524 t->serial_number = smbios_add_string(t->eos, smbios_system_serial_number());
525 t->sku = smbios_add_string(t->eos, smbios_system_sku());
526 t->version = smbios_add_string(t->eos, smbios_system_version());
527 #ifdef CONFIG_MAINBOARD_FAMILY
528 t->family = smbios_add_string(t->eos, CONFIG_MAINBOARD_FAMILY);
529 #endif
530 smbios_system_set_uuid(t->uuid);
531 const int len = t->length + smbios_string_table_len(t->eos);
532 *current += len;
533 return len;
536 static int smbios_write_type2(unsigned long *current, int handle, const int chassis_handle)
538 struct smbios_type2 *t = smbios_carve_table(*current, SMBIOS_BOARD_INFORMATION,
539 sizeof(*t), handle);
541 t->manufacturer = smbios_add_string(t->eos, smbios_mainboard_manufacturer());
542 t->product_name = smbios_add_string(t->eos, smbios_mainboard_product_name());
543 t->serial_number = smbios_add_string(t->eos, smbios_mainboard_serial_number());
544 t->version = smbios_add_string(t->eos, smbios_mainboard_version());
545 t->asset_tag = smbios_add_string(t->eos, smbios_mainboard_asset_tag());
546 t->feature_flags = smbios_mainboard_feature_flags();
547 t->location_in_chassis = smbios_add_string(t->eos,
548 smbios_mainboard_location_in_chassis());
549 t->board_type = smbios_mainboard_board_type();
550 t->chassis_handle = chassis_handle;
551 const int len = t->length + smbios_string_table_len(t->eos);
552 *current += len;
553 return len;
556 static int smbios_write_type3(unsigned long *current, int handle)
558 struct smbios_type3 *t = smbios_carve_table(*current, SMBIOS_SYSTEM_ENCLOSURE,
559 sizeof(*t), handle);
561 t->manufacturer = smbios_add_string(t->eos, smbios_system_manufacturer());
562 t->bootup_state = SMBIOS_STATE_SAFE;
563 t->power_supply_state = SMBIOS_STATE_SAFE;
564 t->thermal_state = SMBIOS_STATE_SAFE;
565 t->_type = smbios_mainboard_enclosure_type();
566 t->security_status = SMBIOS_STATE_SAFE;
567 t->number_of_power_cords = smbios_chassis_power_cords();
568 t->asset_tag_number = smbios_add_string(t->eos, smbios_mainboard_asset_tag());
569 t->version = smbios_add_string(t->eos, smbios_chassis_version());
570 t->serial_number = smbios_add_string(t->eos, smbios_chassis_serial_number());
571 const int len = t->length + smbios_string_table_len(t->eos);
572 *current += len;
573 return len;
576 static int smbios_write_type4(unsigned long *current, int handle)
578 unsigned int cpu_voltage;
579 struct cpuid_result res;
580 uint16_t characteristics = 0;
581 static unsigned int cnt = 0;
582 char buf[8];
584 /* Provide sane defaults even for CPU without CPUID */
585 res.eax = res.edx = 0;
586 res.ebx = 0x10000;
588 if (cpu_have_cpuid())
589 res = cpuid(1);
591 struct smbios_type4 *t = smbios_carve_table(*current, SMBIOS_PROCESSOR_INFORMATION,
592 sizeof(*t), handle);
594 snprintf(buf, sizeof(buf), "CPU%d", cnt++);
595 t->socket_designation = smbios_add_string(t->eos, buf);
597 t->processor_id[0] = res.eax;
598 t->processor_id[1] = res.edx;
599 t->processor_manufacturer = smbios_cpu_vendor(t->eos);
600 t->processor_version = smbios_processor_name(t->eos);
601 t->processor_family = smbios_processor_family(res);
602 t->processor_type = 3; /* System Processor */
604 * If CPUID leaf 11 is available, calculate "core count" by dividing
605 * SMT_ID (logical processors in a core) by Core_ID (number of cores).
606 * This seems to be the way to arrive to a number of cores mentioned on
607 * ark.intel.com.
609 if (cpu_have_cpuid() && cpuid_get_max_func() >= 0xb) {
610 uint32_t leaf_b_cores = 0, leaf_b_threads = 0;
611 res = cpuid_ext(0xb, 1);
612 leaf_b_cores = res.ebx;
613 res = cpuid_ext(0xb, 0);
614 leaf_b_threads = res.ebx;
615 /* if hyperthreading is not available, pretend this is 1 */
616 if (leaf_b_threads == 0) {
617 leaf_b_threads = 1;
619 t->core_count2 = leaf_b_cores / leaf_b_threads;
620 t->core_count = t->core_count2 > 0xff ? 0xff : t->core_count2;
621 t->thread_count2 = leaf_b_cores;
622 t->thread_count = t->thread_count2 > 0xff ? 0xff : t->thread_count2;
623 } else {
624 t->core_count = (res.ebx >> 16) & 0xff;
625 t->core_count2 = t->core_count;
626 t->thread_count2 = t->core_count2;
627 t->thread_count = t->thread_count2;
629 /* Assume we enable all the cores always, capped only by MAX_CPUS */
630 t->core_enabled = MIN(t->core_count, CONFIG_MAX_CPUS);
631 t->core_enabled2 = MIN(t->core_count2, CONFIG_MAX_CPUS);
632 t->l1_cache_handle = 0xffff;
633 t->l2_cache_handle = 0xffff;
634 t->l3_cache_handle = 0xffff;
635 t->serial_number = smbios_add_string(t->eos, smbios_processor_serial_number());
636 t->status = SMBIOS_PROCESSOR_STATUS_CPU_ENABLED | SMBIOS_PROCESSOR_STATUS_POPULATED;
637 t->processor_upgrade = get_socket_type();
638 const int len = t->length + smbios_string_table_len(t->eos);
639 if (cpu_have_cpuid() && cpuid_get_max_func() >= 0x16) {
640 t->current_speed = cpuid_eax(0x16); /* base frequency */
641 t->external_clock = cpuid_ecx(0x16);
642 } else {
643 t->current_speed = smbios_cpu_get_current_speed_mhz();
644 t->external_clock = smbios_processor_external_clock();
647 /* This field identifies a capability for the system, not the processor itself. */
648 t->max_speed = smbios_cpu_get_max_speed_mhz();
650 if (cpu_have_cpuid()) {
651 res = cpuid(1);
653 if ((res.ecx) & BIT(5))
654 characteristics |= BIT(6); /* BIT6: Enhanced Virtualization */
656 if ((res.edx) & BIT(28))
657 characteristics |= BIT(4); /* BIT4: Hardware Thread */
659 if (((cpuid_eax(0x80000000) - 0x80000000) + 1) > 2) {
660 res = cpuid(0x80000001);
662 if ((res.edx) & BIT(20))
663 characteristics |= BIT(5); /* BIT5: Execute Protection */
666 t->processor_characteristics = characteristics | smbios_processor_characteristics();
667 cpu_voltage = smbios_cpu_get_voltage();
668 if (cpu_voltage > 0)
669 t->voltage = 0x80 | cpu_voltage;
671 *current += len;
672 return len;
676 * Write SMBIOS type 7.
677 * Fill in some fields with constant values, as gathering the information
678 * from CPUID is impossible.
680 static int smbios_write_type7(unsigned long *current,
681 const int handle,
682 const u8 level,
683 const u8 sram_type,
684 const enum smbios_cache_associativity associativity,
685 const enum smbios_cache_type type,
686 const size_t max_cache_size,
687 const size_t cache_size)
689 char buf[8];
691 struct smbios_type7 *t = smbios_carve_table(*current, SMBIOS_CACHE_INFORMATION,
692 sizeof(*t), handle);
694 snprintf(buf, sizeof(buf), "CACHE%x", level);
695 t->socket_designation = smbios_add_string(t->eos, buf);
697 t->cache_configuration = SMBIOS_CACHE_CONF_LEVEL(level) |
698 SMBIOS_CACHE_CONF_LOCATION(0) | /* Internal */
699 SMBIOS_CACHE_CONF_ENABLED(1) | /* Enabled */
700 SMBIOS_CACHE_CONF_OPERATION_MODE(smbios_cache_conf_operation_mode(level));
702 if (max_cache_size < (SMBIOS_CACHE_SIZE_MASK * KiB)) {
703 t->max_cache_size = max_cache_size / KiB;
704 t->max_cache_size2 = t->max_cache_size;
706 t->max_cache_size |= SMBIOS_CACHE_SIZE_UNIT_1KB;
707 t->max_cache_size2 |= SMBIOS_CACHE_SIZE2_UNIT_1KB;
708 } else {
709 if (max_cache_size < (SMBIOS_CACHE_SIZE_MASK * 64 * KiB))
710 t->max_cache_size = max_cache_size / (64 * KiB);
711 else
712 t->max_cache_size = SMBIOS_CACHE_SIZE_OVERFLOW;
713 t->max_cache_size2 = max_cache_size / (64 * KiB);
715 t->max_cache_size |= SMBIOS_CACHE_SIZE_UNIT_64KB;
716 t->max_cache_size2 |= SMBIOS_CACHE_SIZE2_UNIT_64KB;
719 if (cache_size < (SMBIOS_CACHE_SIZE_MASK * KiB)) {
720 t->installed_size = cache_size / KiB;
721 t->installed_size2 = t->installed_size;
723 t->installed_size |= SMBIOS_CACHE_SIZE_UNIT_1KB;
724 t->installed_size2 |= SMBIOS_CACHE_SIZE2_UNIT_1KB;
725 } else {
726 if (cache_size < (SMBIOS_CACHE_SIZE_MASK * 64 * KiB))
727 t->installed_size = cache_size / (64 * KiB);
728 else
729 t->installed_size = SMBIOS_CACHE_SIZE_OVERFLOW;
730 t->installed_size2 = cache_size / (64 * KiB);
732 t->installed_size |= SMBIOS_CACHE_SIZE_UNIT_64KB;
733 t->installed_size2 |= SMBIOS_CACHE_SIZE2_UNIT_64KB;
736 t->associativity = associativity;
737 t->supported_sram_type = sram_type;
738 t->current_sram_type = sram_type;
739 t->cache_speed = 0; /* Unknown */
740 t->error_correction_type = smbios_cache_error_correction_type(level);
741 t->system_cache_type = type;
743 const int len = t->length + smbios_string_table_len(t->eos);
744 *current += len;
745 return len;
748 /* Convert the associativity as integer to the SMBIOS enum if available */
749 static enum smbios_cache_associativity smbios_cache_associativity(const u8 num)
751 switch (num) {
752 case 1:
753 return SMBIOS_CACHE_ASSOCIATIVITY_DIRECT;
754 case 2:
755 return SMBIOS_CACHE_ASSOCIATIVITY_2WAY;
756 case 4:
757 return SMBIOS_CACHE_ASSOCIATIVITY_4WAY;
758 case 8:
759 return SMBIOS_CACHE_ASSOCIATIVITY_8WAY;
760 case 12:
761 return SMBIOS_CACHE_ASSOCIATIVITY_12WAY;
762 case 16:
763 return SMBIOS_CACHE_ASSOCIATIVITY_16WAY;
764 case 20:
765 return SMBIOS_CACHE_ASSOCIATIVITY_20WAY;
766 case 24:
767 return SMBIOS_CACHE_ASSOCIATIVITY_24WAY;
768 case 32:
769 return SMBIOS_CACHE_ASSOCIATIVITY_32WAY;
770 case 48:
771 return SMBIOS_CACHE_ASSOCIATIVITY_48WAY;
772 case 64:
773 return SMBIOS_CACHE_ASSOCIATIVITY_64WAY;
774 case 0xff:
775 return SMBIOS_CACHE_ASSOCIATIVITY_FULL;
776 default:
777 return SMBIOS_CACHE_ASSOCIATIVITY_UNKNOWN;
782 * Parse the "Deterministic Cache Parameters" as provided by Intel in
783 * leaf 4 or AMD in extended leaf 0x8000001d.
785 * @param current Pointer to memory address to write the tables to
786 * @param handle Pointer to handle for the tables
787 * @param max_struct_size Pointer to maximum struct size
788 * @param type4 Pointer to SMBIOS type 4 structure
790 static int smbios_write_type7_cache_parameters(unsigned long *current,
791 int *handle,
792 int *max_struct_size,
793 struct smbios_type4 *type4)
795 struct cpuid_result res;
796 unsigned int cnt = 0;
797 int len = 0;
798 u32 leaf;
800 if (!cpu_have_cpuid())
801 return len;
803 if (cpu_is_intel()) {
804 res = cpuid(0);
805 if (res.eax < 4)
806 return len;
807 leaf = 4;
808 } else if (cpu_is_amd()) {
809 res = cpuid(0x80000000);
810 if (res.eax < 0x80000001)
811 return len;
813 res = cpuid(0x80000001);
814 if (!(res.ecx & (1 << 22)))
815 return len;
817 leaf = 0x8000001d;
818 } else {
819 printk(BIOS_DEBUG, "SMBIOS: Unknown CPU\n");
820 return len;
823 while (1) {
824 enum smbios_cache_associativity associativity;
825 enum smbios_cache_type type;
827 res = cpuid_ext(leaf, cnt++);
829 const u8 cache_type = CPUID_CACHE_TYPE(res);
830 const u8 level = CPUID_CACHE_LEVEL(res);
831 const size_t assoc = CPUID_CACHE_WAYS_OF_ASSOC(res) + 1;
832 const size_t partitions = CPUID_CACHE_PHYS_LINE(res) + 1;
833 const size_t cache_line_size = CPUID_CACHE_COHER_LINE(res) + 1;
834 const size_t number_of_sets = CPUID_CACHE_NO_OF_SETS(res) + 1;
835 const size_t cache_size = assoc * partitions * cache_line_size * number_of_sets
836 * get_number_of_caches(res);
838 if (!cache_type)
839 /* No more caches in the system */
840 break;
842 switch (cache_type) {
843 case 1:
844 type = SMBIOS_CACHE_TYPE_DATA;
845 break;
846 case 2:
847 type = SMBIOS_CACHE_TYPE_INSTRUCTION;
848 break;
849 case 3:
850 type = SMBIOS_CACHE_TYPE_UNIFIED;
851 break;
852 default:
853 type = SMBIOS_CACHE_TYPE_UNKNOWN;
854 break;
857 if (CPUID_CACHE_FULL_ASSOC(res))
858 associativity = SMBIOS_CACHE_ASSOCIATIVITY_FULL;
859 else
860 associativity = smbios_cache_associativity(assoc);
862 const int h = (*handle)++;
864 update_max(len, *max_struct_size, smbios_write_type7(current, h,
865 level, smbios_cache_sram_type(), associativity,
866 type, cache_size, cache_size));
868 if (type4) {
869 switch (level) {
870 case 1:
871 type4->l1_cache_handle = h;
872 break;
873 case 2:
874 type4->l2_cache_handle = h;
875 break;
876 case 3:
877 type4->l3_cache_handle = h;
878 break;
883 return len;
886 int smbios_write_type8(unsigned long *current, int *handle,
887 const struct port_information *port,
888 size_t num_ports)
890 unsigned int totallen = 0, i;
892 for (i = 0; i < num_ports; i++, port++) {
893 struct smbios_type8 *t = smbios_carve_table(*current,
894 SMBIOS_PORT_CONNECTOR_INFORMATION,
895 sizeof(*t), *handle);
896 t->internal_reference_designator =
897 smbios_add_string(t->eos, port->internal_reference_designator);
898 t->internal_connector_type = port->internal_connector_type;
899 t->external_reference_designator =
900 smbios_add_string(t->eos, port->external_reference_designator);
901 t->external_connector_type = port->external_connector_type;
902 t->port_type = port->port_type;
903 *handle += 1;
904 *current += t->length + smbios_string_table_len(t->eos);
905 totallen += t->length + smbios_string_table_len(t->eos);
907 return totallen;
910 int smbios_write_type9(unsigned long *current, int *handle,
911 const char *name, const enum misc_slot_type type,
912 const enum slot_data_bus_bandwidth bandwidth,
913 const enum misc_slot_usage usage,
914 const enum misc_slot_length length,
915 const u16 id, u8 slot_char1, u8 slot_char2, u8 bus, u8 dev_func)
917 struct smbios_type9 *t = smbios_carve_table(*current, SMBIOS_SYSTEM_SLOTS,
918 sizeof(*t), *handle);
920 t->slot_designation = smbios_add_string(t->eos, name ? name : "SLOT");
921 t->slot_type = type;
922 /* TODO add slot_id supoort, will be "_SUN" for ACPI devices */
923 t->slot_id = id;
924 t->slot_data_bus_width = bandwidth;
925 t->current_usage = usage;
926 t->slot_length = length;
927 t->slot_characteristics_1 = slot_char1;
928 t->slot_characteristics_2 = slot_char2;
929 t->segment_group_number = 0;
930 t->bus_number = bus;
931 t->device_function_number = dev_func;
932 t->data_bus_width = SlotDataBusWidthOther;
934 const int len = t->length + smbios_string_table_len(t->eos);
935 *current += len;
936 *handle += 1;
937 return len;
940 static int smbios_write_type11(unsigned long *current, int *handle)
942 struct device *dev;
943 struct smbios_type11 *t = smbios_carve_table(*current, SMBIOS_OEM_STRINGS,
944 sizeof(*t), *handle);
946 for (dev = all_devices; dev; dev = dev->next) {
947 if (dev->ops && dev->ops->get_smbios_strings)
948 dev->ops->get_smbios_strings(dev, t);
951 if (t->count == 0) {
952 memset(t, 0, sizeof(*t));
953 return 0;
956 const int len = t->length + smbios_string_table_len(t->eos);
957 *current += len;
958 (*handle)++;
959 return len;
962 static int smbios_write_type16(unsigned long *current, int *handle)
964 int i;
965 uint64_t max_capacity;
967 struct memory_info *meminfo;
968 meminfo = cbmem_find(CBMEM_ID_MEMINFO);
969 if (meminfo == NULL)
970 return 0; /* can't find mem info in cbmem */
972 printk(BIOS_INFO, "Create SMBIOS type 16\n");
974 if (meminfo->max_capacity_mib == 0 || meminfo->number_of_devices == 0) {
975 /* Fill in defaults if not provided */
976 meminfo->number_of_devices = 0;
977 meminfo->max_capacity_mib = 0;
978 for (i = 0; i < meminfo->dimm_cnt && i < ARRAY_SIZE(meminfo->dimm); i++) {
979 meminfo->max_capacity_mib += meminfo->dimm[i].dimm_size;
980 meminfo->number_of_devices += !!meminfo->dimm[i].dimm_size;
984 struct smbios_type16 *t = smbios_carve_table(*current, SMBIOS_PHYS_MEMORY_ARRAY,
985 sizeof(*t), *handle);
987 t->location = MEMORY_ARRAY_LOCATION_SYSTEM_BOARD;
988 t->use = MEMORY_ARRAY_USE_SYSTEM;
989 t->memory_error_correction = meminfo->ecc_type;
991 /* no error information handle available */
992 t->memory_error_information_handle = 0xFFFE;
993 max_capacity = meminfo->max_capacity_mib;
994 if (max_capacity * (MiB / KiB) < SMBIOS_USE_EXTENDED_MAX_CAPACITY)
995 t->maximum_capacity = max_capacity * (MiB / KiB);
996 else {
997 t->maximum_capacity = SMBIOS_USE_EXTENDED_MAX_CAPACITY;
998 t->extended_maximum_capacity = max_capacity * MiB;
1000 t->number_of_memory_devices = meminfo->number_of_devices;
1002 const int len = t->length + smbios_string_table_len(t->eos);
1003 *current += len;
1004 (*handle)++;
1005 return len;
1008 static int smbios_write_type17(unsigned long *current, int *handle, int type16)
1010 int totallen = 0;
1011 int i;
1013 struct memory_info *meminfo;
1014 meminfo = cbmem_find(CBMEM_ID_MEMINFO);
1015 if (meminfo == NULL)
1016 return 0; /* can't find mem info in cbmem */
1018 printk(BIOS_INFO, "Create SMBIOS type 17\n");
1019 for (i = 0; i < meminfo->dimm_cnt && i < ARRAY_SIZE(meminfo->dimm); i++) {
1020 struct dimm_info *dimm;
1021 dimm = &meminfo->dimm[i];
1023 * Windows 10 GetPhysicallyInstalledSystemMemory functions reads SMBIOS tables
1024 * type 16 and type 17. The type 17 tables need to point to a type 16 table.
1025 * Otherwise, the physical installed memory size is guessed from the system
1026 * memory map, which results in a slightly smaller value than the actual size.
1028 const int len = create_smbios_type17_for_dimm(dimm, current, handle, type16);
1029 *current += len;
1030 totallen += len;
1032 return totallen;
1035 static int smbios_write_type19(unsigned long *current, int *handle, int type16)
1037 int i;
1039 struct memory_info *meminfo;
1040 meminfo = cbmem_find(CBMEM_ID_MEMINFO);
1041 if (meminfo == NULL)
1042 return 0; /* can't find mem info in cbmem */
1044 struct smbios_type19 *t = smbios_carve_table(*current,
1045 SMBIOS_MEMORY_ARRAY_MAPPED_ADDRESS,
1046 sizeof(*t), *handle);
1048 t->memory_array_handle = type16;
1050 for (i = 0; i < meminfo->dimm_cnt && i < ARRAY_SIZE(meminfo->dimm); i++) {
1051 if (meminfo->dimm[i].dimm_size > 0) {
1052 t->extended_ending_address += meminfo->dimm[i].dimm_size;
1053 t->partition_width++;
1056 t->extended_ending_address *= MiB;
1058 /* Check if it fits into regular address */
1059 if (t->extended_ending_address >= KiB &&
1060 t->extended_ending_address < 0x40000000000ULL) {
1062 * FIXME: The starting address is SoC specific, but SMBIOS tables are only
1063 * exported on x86 where it's always 0.
1066 t->starting_address = 0;
1067 t->ending_address = t->extended_ending_address / KiB - 1;
1068 t->extended_starting_address = ~0;
1069 t->extended_ending_address = ~0;
1070 } else {
1071 t->starting_address = ~0;
1072 t->ending_address = ~0;
1073 t->extended_starting_address = 0;
1074 t->extended_ending_address--;
1077 const int len = t->length + smbios_string_table_len(t->eos);
1078 *current += len;
1079 *handle += 1;
1080 return len;
1083 static int smbios_write_type32(unsigned long *current, int handle)
1085 struct smbios_type32 *t = smbios_carve_table(*current, SMBIOS_SYSTEM_BOOT_INFORMATION,
1086 sizeof(*t), handle);
1088 const int len = sizeof(*t);
1089 *current += len;
1090 return len;
1093 int smbios_write_type38(unsigned long *current, int *handle,
1094 const enum smbios_bmc_interface_type interface_type,
1095 const u8 ipmi_rev, const u8 i2c_addr, const u8 nv_addr,
1096 const u64 base_addr, const u8 base_modifier,
1097 const u8 irq)
1099 struct smbios_type38 *t = smbios_carve_table(*current, SMBIOS_IPMI_DEVICE_INFORMATION,
1100 sizeof(*t), *handle);
1102 t->interface_type = interface_type;
1103 t->ipmi_rev = ipmi_rev;
1104 t->i2c_slave_addr = i2c_addr;
1105 t->nv_storage_addr = nv_addr;
1106 t->base_address = base_addr;
1107 t->base_address_modifier = base_modifier;
1108 t->irq = irq;
1110 const int len = sizeof(*t);
1111 *current += len;
1112 *handle += 1;
1113 return len;
1116 int smbios_write_type41(unsigned long *current, int *handle,
1117 const char *name, u8 instance, u16 segment,
1118 u8 bus, u8 device, u8 function, u8 device_type)
1120 struct smbios_type41 *t = smbios_carve_table(*current,
1121 SMBIOS_ONBOARD_DEVICES_EXTENDED_INFORMATION,
1122 sizeof(*t), *handle);
1124 t->reference_designation = smbios_add_string(t->eos, name);
1125 t->device_type = device_type;
1126 t->device_status = 1;
1127 t->device_type_instance = instance;
1128 t->segment_group_number = segment;
1129 t->bus_number = bus;
1130 t->device_number = device;
1131 t->function_number = function;
1133 const int len = t->length + smbios_string_table_len(t->eos);
1134 *current += len;
1135 *handle += 1;
1136 return len;
1139 static int smbios_write_type127(unsigned long *current, int handle)
1141 struct smbios_type127 *t = smbios_carve_table(*current, SMBIOS_END_OF_TABLE,
1142 sizeof(*t), handle);
1144 const int len = sizeof(*t);
1145 *current += len;
1146 return len;
1149 /* Generate Type41 entries from devicetree */
1150 static int smbios_walk_device_tree_type41(struct device *dev, int *handle,
1151 unsigned long *current)
1153 static u8 type41_inst_cnt[SMBIOS_DEVICE_TYPE_COUNT + 1] = {};
1155 if (dev->path.type != DEVICE_PATH_PCI)
1156 return 0;
1157 if (!dev->on_mainboard)
1158 return 0;
1160 u8 device_type = smbios_get_device_type_from_dev(dev);
1162 if (device_type == SMBIOS_DEVICE_TYPE_OTHER ||
1163 device_type == SMBIOS_DEVICE_TYPE_UNKNOWN)
1164 return 0;
1166 if (device_type > SMBIOS_DEVICE_TYPE_COUNT)
1167 return 0;
1169 const char *name = get_pci_subclass_name(dev);
1171 return smbios_write_type41(current, handle,
1172 name, // name
1173 type41_inst_cnt[device_type]++, // inst
1174 0, // segment
1175 dev->bus->secondary, //bus
1176 PCI_SLOT(dev->path.pci.devfn), // device
1177 PCI_FUNC(dev->path.pci.devfn), // func
1178 device_type);
1181 /* Generate Type9 entries from devicetree */
1182 static int smbios_walk_device_tree_type9(struct device *dev, int *handle,
1183 unsigned long *current)
1185 enum misc_slot_usage usage;
1186 enum slot_data_bus_bandwidth bandwidth;
1187 enum misc_slot_type type;
1188 enum misc_slot_length length;
1190 if (dev->path.type != DEVICE_PATH_PCI)
1191 return 0;
1193 if (!dev->smbios_slot_type && !dev->smbios_slot_data_width &&
1194 !dev->smbios_slot_designation && !dev->smbios_slot_length)
1195 return 0;
1197 if (dev_is_active_bridge(dev))
1198 usage = SlotUsageInUse;
1199 else if (dev->enabled)
1200 usage = SlotUsageAvailable;
1201 else
1202 usage = SlotUsageUnknown;
1204 if (dev->smbios_slot_data_width)
1205 bandwidth = dev->smbios_slot_data_width;
1206 else
1207 bandwidth = SlotDataBusWidthUnknown;
1209 if (dev->smbios_slot_type)
1210 type = dev->smbios_slot_type;
1211 else
1212 type = SlotTypeUnknown;
1214 if (dev->smbios_slot_length)
1215 length = dev->smbios_slot_length;
1216 else
1217 length = SlotLengthUnknown;
1219 return smbios_write_type9(current, handle,
1220 dev->smbios_slot_designation,
1221 type,
1222 bandwidth,
1223 usage,
1224 length,
1228 dev->bus->secondary,
1229 dev->path.pci.devfn);
1232 static int smbios_walk_device_tree(struct device *tree, int *handle, unsigned long *current)
1234 struct device *dev;
1235 int len = 0;
1237 for (dev = tree; dev; dev = dev->next) {
1238 if (dev->enabled && dev->ops && dev->ops->get_smbios_data) {
1239 printk(BIOS_INFO, "%s (%s)\n", dev_path(dev), dev_name(dev));
1240 len += dev->ops->get_smbios_data(dev, handle, current);
1242 len += smbios_walk_device_tree_type9(dev, handle, current);
1243 len += smbios_walk_device_tree_type41(dev, handle, current);
1245 return len;
1248 unsigned long smbios_write_tables(unsigned long current)
1250 struct smbios_entry *se;
1251 struct smbios_entry30 *se3;
1252 unsigned long tables;
1253 int len = 0;
1254 int max_struct_size = 0;
1255 int handle = 0;
1257 current = ALIGN_UP(current, 16);
1258 printk(BIOS_DEBUG, "%s: %08lx\n", __func__, current);
1260 se = (struct smbios_entry *)current;
1261 current += sizeof(*se);
1262 current = ALIGN_UP(current, 16);
1264 se3 = (struct smbios_entry30 *)current;
1265 current += sizeof(*se3);
1266 current = ALIGN_UP(current, 16);
1268 tables = current;
1269 update_max(len, max_struct_size, smbios_write_type0(&current, handle++));
1270 update_max(len, max_struct_size, smbios_write_type1(&current, handle++));
1272 /* The chassis handle is the next one */
1273 update_max(len, max_struct_size, smbios_write_type2(&current, handle, handle + 1));
1274 handle++;
1275 update_max(len, max_struct_size, smbios_write_type3(&current, handle++));
1277 struct smbios_type4 *type4 = (struct smbios_type4 *)current;
1278 update_max(len, max_struct_size, smbios_write_type4(&current, handle++));
1279 len += smbios_write_type7_cache_parameters(&current, &handle, &max_struct_size, type4);
1280 update_max(len, max_struct_size, smbios_write_type11(&current, &handle));
1281 if (CONFIG(ELOG))
1282 update_max(len, max_struct_size,
1283 elog_smbios_write_type15(&current, handle++));
1285 const int type16 = handle;
1286 update_max(len, max_struct_size, smbios_write_type16(&current, &handle));
1287 update_max(len, max_struct_size, smbios_write_type17(&current, &handle, type16));
1288 update_max(len, max_struct_size, smbios_write_type19(&current, &handle, type16));
1289 update_max(len, max_struct_size, smbios_write_type32(&current, handle++));
1291 update_max(len, max_struct_size, smbios_walk_device_tree(all_devices,
1292 &handle, &current));
1294 update_max(len, max_struct_size, smbios_write_type127(&current, handle++));
1296 /* Install SMBIOS 2.1 entry point */
1297 memset(se, 0, sizeof(*se));
1298 memcpy(se->anchor, "_SM_", 4);
1299 se->length = sizeof(*se);
1300 se->major_version = 3;
1301 se->minor_version = 0;
1302 se->max_struct_size = max_struct_size;
1303 se->struct_count = handle;
1304 memcpy(se->intermediate_anchor_string, "_DMI_", 5);
1306 se->struct_table_address = (u32)tables;
1307 se->struct_table_length = len;
1309 se->intermediate_checksum = smbios_checksum((u8 *)se + 0x10, sizeof(*se) - 0x10);
1310 se->checksum = smbios_checksum((u8 *)se, sizeof(*se));
1312 /* Install SMBIOS 3.0 entry point */
1313 memset(se3, 0, sizeof(*se3));
1314 memcpy(se3->anchor, "_SM3_", 5);
1315 se3->length = sizeof(*se3);
1316 se3->major_version = 3;
1317 se3->minor_version = 0;
1319 se3->struct_table_address = (u64)tables;
1320 se3->struct_table_length = len;
1322 se3->checksum = smbios_checksum((u8 *)se3, sizeof(*se3));
1324 return current;