include/stdint.h: Remove old reference to ROMCC
[coreboot.git] / util / inteltool / rootcmplx.c
blob70d7cbe3ed3035b0f1128d107d0fdbd7d135558c
1 /*
2 * inteltool - dump all registers on an Intel CPU + chipset based system.
4 * Copyright (C) 2008 by coresystems GmbH
5 * written by Stefan Reinauer <stepan@coresystems.de>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
17 #include <stdio.h>
18 #include <stdlib.h>
19 #include "inteltool.h"
21 int print_rcba(struct pci_dev *sb)
23 int i, size = 0x4000;
24 volatile uint8_t *rcba;
25 uint32_t rcba_phys;
27 printf("\n============= RCBA ==============\n\n");
29 switch (sb->device_id) {
30 case PCI_DEVICE_ID_INTEL_ICH6:
31 case PCI_DEVICE_ID_INTEL_ICH7:
32 case PCI_DEVICE_ID_INTEL_ICH7M:
33 case PCI_DEVICE_ID_INTEL_ICH7DH:
34 case PCI_DEVICE_ID_INTEL_ICH7MDH:
35 case PCI_DEVICE_ID_INTEL_ICH8:
36 case PCI_DEVICE_ID_INTEL_ICH8M:
37 case PCI_DEVICE_ID_INTEL_ICH8ME:
38 case PCI_DEVICE_ID_INTEL_ICH9DH:
39 case PCI_DEVICE_ID_INTEL_ICH9DO:
40 case PCI_DEVICE_ID_INTEL_ICH9R:
41 case PCI_DEVICE_ID_INTEL_ICH9:
42 case PCI_DEVICE_ID_INTEL_ICH9M:
43 case PCI_DEVICE_ID_INTEL_ICH9ME:
44 case PCI_DEVICE_ID_INTEL_ICH10:
45 case PCI_DEVICE_ID_INTEL_ICH10R:
46 case PCI_DEVICE_ID_INTEL_NM10:
47 case PCI_DEVICE_ID_INTEL_I63XX:
48 case PCI_DEVICE_ID_INTEL_3400:
49 case PCI_DEVICE_ID_INTEL_3420:
50 case PCI_DEVICE_ID_INTEL_3450:
51 case PCI_DEVICE_ID_INTEL_3400_DESKTOP:
52 case PCI_DEVICE_ID_INTEL_3400_MOBILE:
53 case PCI_DEVICE_ID_INTEL_3400_MOBILE_SFF:
54 case PCI_DEVICE_ID_INTEL_B55_A:
55 case PCI_DEVICE_ID_INTEL_B55_B:
56 case PCI_DEVICE_ID_INTEL_H55:
57 case PCI_DEVICE_ID_INTEL_H57:
58 case PCI_DEVICE_ID_INTEL_HM55:
59 case PCI_DEVICE_ID_INTEL_HM57:
60 case PCI_DEVICE_ID_INTEL_P55:
61 case PCI_DEVICE_ID_INTEL_PM55:
62 case PCI_DEVICE_ID_INTEL_Q57:
63 case PCI_DEVICE_ID_INTEL_QM57:
64 case PCI_DEVICE_ID_INTEL_QS57:
65 case PCI_DEVICE_ID_INTEL_Z68:
66 case PCI_DEVICE_ID_INTEL_P67:
67 case PCI_DEVICE_ID_INTEL_UM67:
68 case PCI_DEVICE_ID_INTEL_HM65:
69 case PCI_DEVICE_ID_INTEL_H67:
70 case PCI_DEVICE_ID_INTEL_HM67:
71 case PCI_DEVICE_ID_INTEL_Q65:
72 case PCI_DEVICE_ID_INTEL_QS67:
73 case PCI_DEVICE_ID_INTEL_Q67:
74 case PCI_DEVICE_ID_INTEL_QM67:
75 case PCI_DEVICE_ID_INTEL_B65:
76 case PCI_DEVICE_ID_INTEL_C202:
77 case PCI_DEVICE_ID_INTEL_C204:
78 case PCI_DEVICE_ID_INTEL_C206:
79 case PCI_DEVICE_ID_INTEL_H61:
80 case PCI_DEVICE_ID_INTEL_Z77:
81 case PCI_DEVICE_ID_INTEL_Z75:
82 case PCI_DEVICE_ID_INTEL_Q77:
83 case PCI_DEVICE_ID_INTEL_Q75:
84 case PCI_DEVICE_ID_INTEL_B75:
85 case PCI_DEVICE_ID_INTEL_H77:
86 case PCI_DEVICE_ID_INTEL_C216:
87 case PCI_DEVICE_ID_INTEL_QM77:
88 case PCI_DEVICE_ID_INTEL_QS77:
89 case PCI_DEVICE_ID_INTEL_HM77:
90 case PCI_DEVICE_ID_INTEL_UM77:
91 case PCI_DEVICE_ID_INTEL_HM76:
92 case PCI_DEVICE_ID_INTEL_HM75:
93 case PCI_DEVICE_ID_INTEL_HM70:
94 case PCI_DEVICE_ID_INTEL_NM70:
95 case PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_FULL:
96 case PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_PREM:
97 case PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_BASE:
98 case PCI_DEVICE_ID_INTEL_WILDCATPOINT_LP_PREM:
99 case PCI_DEVICE_ID_INTEL_WILDCATPOINT_LP:
100 case PCI_DEVICE_ID_INTEL_C8_MOBILE:
101 case PCI_DEVICE_ID_INTEL_C8_DESKTOP:
102 case PCI_DEVICE_ID_INTEL_Z87:
103 case PCI_DEVICE_ID_INTEL_Z85:
104 case PCI_DEVICE_ID_INTEL_HM86:
105 case PCI_DEVICE_ID_INTEL_H87:
106 case PCI_DEVICE_ID_INTEL_HM87:
107 case PCI_DEVICE_ID_INTEL_Q85:
108 case PCI_DEVICE_ID_INTEL_Q87:
109 case PCI_DEVICE_ID_INTEL_QM87:
110 case PCI_DEVICE_ID_INTEL_B85:
111 case PCI_DEVICE_ID_INTEL_C222:
112 case PCI_DEVICE_ID_INTEL_C224:
113 case PCI_DEVICE_ID_INTEL_C226:
114 case PCI_DEVICE_ID_INTEL_H81:
115 case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_PRE:
116 case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_BASE_SKL:
117 case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_Y_PREM_SKL:
118 case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_PREM_SKL:
119 case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_BASE_KBL:
120 case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_PREM_KBL:
121 case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_Y_PREM_KBL:
122 case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_IHDCP_BASE:
123 case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_IHDCP_PREM:
124 case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_Y_IHDCP_PREM:
125 rcba_phys = pci_read_long(sb, 0xf0) & 0xfffffffe;
126 break;
127 case PCI_DEVICE_ID_INTEL_ICH:
128 case PCI_DEVICE_ID_INTEL_ICH0:
129 case PCI_DEVICE_ID_INTEL_ICH2:
130 case PCI_DEVICE_ID_INTEL_ICH4:
131 case PCI_DEVICE_ID_INTEL_ICH4M:
132 case PCI_DEVICE_ID_INTEL_ICH5:
133 printf("This southbridge does not have RCBA.\n");
134 return 1;
135 default:
136 printf("Error: Dumping RCBA on this southbridge is not (yet) supported.\n");
137 return 1;
140 rcba = map_physical(rcba_phys, size);
142 if (rcba == NULL) {
143 perror("Error mapping RCBA");
144 exit(1);
147 printf("RCBA = 0x%08x (MEM)\n\n", rcba_phys);
149 for (i = 0; i < size; i += 4) {
150 if (*(uint32_t *)(rcba + i))
151 printf("0x%04x: 0x%08x\n", i, *(uint32_t *)(rcba + i));
154 unmap_physical((void *)rcba, size);
155 return 0;