soc/intel/skylake: Correct address of I2C5 Device
[coreboot.git] / src / include / gic.h
blobf7339a43a7571238a9378176897ca173eaa2d0a7
1 /*
2 * This file is part of the coreboot project.
4 * Copyright (C) 2014 Google Inc
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
16 #ifndef GIC_H
17 #define GIC_H
19 #if IS_ENABLED(CONFIG_GIC)
21 /* Initialize the GIC on the currently processor, including GICD and GICC. */
22 void gic_init(void);
23 void gic_disable(void);
24 void gic_enable(void);
26 /* Return a pointer to the base of the GIC distributor mmio region. */
27 void *gicd_base(void);
29 /* Return a pointer to the base of the GIC CPU mmio region. */
30 void *gicc_base(void);
32 #else /* CONFIG_GIC */
34 static inline void gic_init(void) {}
35 static inline void gic_disable(void) {}
37 #endif /* CONFIG_GIC */
39 #endif /* GIC_H */