src/mainboard/google/brya/dsdt.asl

   1 /* SPDX-License-Identifier: GPL-2.0-or-later */
   2
   3 #include <acpi/acpi.h>
   4 #include <variant/ec.h>
   5
   6 DefinitionBlock(
   7         "dsdt.aml",
   8         "DSDT",
   9         ACPI_DSDT_REV_2,
  10         OEM_ID,
  11         ACPI_TABLE_CREATOR,
  12         0x20110725      // OEM revision
  13 )
  14 {
  15         #include <acpi/dsdt_top.asl>
  16         /* Some generic macros */
  17         #include <soc/intel/common/acpi/platform.asl>
  18
  19         /* global NVS and variables */
  20         #include <soc/intel/common/block/acpi/acpi/globalnvs.asl>
  21
  22         /* CPU */
  23         #include <cpu/intel/common/acpi/cpu.asl>
  24
  25         Scope (\_SB) {
  26                 Device (PCI0)
  27                 {
  28                         #include <soc/intel/common/block/acpi/acpi/northbridge.asl>
  29                         #include <soc/intel/alderlake/acpi/southbridge.asl>
  30                 }
  31         }
  32
  33         /* Chipset specific sleep states */
  34         #include <southbridge/intel/common/acpi/sleepstates.asl>
  35
  36         /* Chrome OS specific */
  37         #include <vendorcode/google/chromeos/acpi/chromeos.asl>
  38
  39         /* Chrome OS Embedded Controller */
  40         Scope (\_SB.PCI0.LPCB)
  41         {
  42                 /* ACPI code for EC SuperIO functions */
  43                 #include <ec/google/chromeec/acpi/superio.asl>
  44                 /* ACPI code for EC functions */
  45                 #include <ec/google/chromeec/acpi/ec.asl>
  46         }
  47 }