ACPI: Add top-level ASL
[coreboot.git] / src / mainboard / amd / union_station / dsdt.asl
blobd81c672af8378be9caf4f535b713a02870792809
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 /* DefinitionBlock Statement */
4 #include <acpi/acpi.h>
5 DefinitionBlock (
6         "dsdt.aml",
7         "DSDT",
8         ACPI_DSDT_REV_2,
9         OEM_ID,
10         ACPI_TABLE_CREATOR,
11         0x00010001      /* OEM Revision */
12         )
13 {       /* Start of ASL file */
14         #include <acpi/dsdt_top.asl>
16         #include "acpi/mainboard.asl"
18         #include <cpu/amd/agesa/family14/acpi/cpu.asl>
20         #include "acpi/routing.asl"
22         Scope(\_SB) {
23                 /* global utility methods expected within the \_SB scope */
24                 #include <arch/x86/acpi/globutil.asl>
26                 Device(PCI0) {
28                         /* Describe the AMD Northbridge */
29                         #include <northbridge/amd/agesa/family14/acpi/northbridge.asl>
31                         /* Describe the AMD Fusion Controller Hub Southbridge */
32                         #include <southbridge/amd/cimx/sb800/acpi/fch.asl>
34                         /* Primary (and only) IDE channel */
35                         Device(IDEC) {
36                                 Name(_ADR, 0x00140001)
37                                 #include "acpi/ide.asl"
38                         } /* end IDEC */
40                 }
41         }   /* End Scope(_SB)  */
43         /* Contains the supported sleep states for this chipset */
44         #include <southbridge/amd/common/acpi/sleepstates.asl>
46         /* Contains the Sleep methods (WAK, PTS, GTS, etc.) */
47         #include "acpi/sleep.asl"
49         #include "acpi/gpe.asl"
51 /* End of ASL file */