util/inteltool/inteltool.h

   1 /*
   2  * inteltool - dump all registers on an Intel CPU + chipset based system.
   3  *
   4  * Copyright (C) 2008-2010 by coresystems GmbH
   5  * Copyright (C) 2009 Carl-Daniel Hailfinger
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; version 2 of the License.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  */
  16
  17 #ifndef INTELTOOL_H
  18 #define INTELTOOL_H 1
  19
  20 #include <commonlib/helpers.h>
  21
  22 #include <stdint.h>
  23
  24 #if defined(__GLIBC__)
  25 #include <sys/io.h>
  26 #endif
  27 #if (defined(__MACH__) && defined(__APPLE__))
  28 /* DirectHW is available here: https://www.coreboot.org/DirectHW */
  29 #define __DARWIN__
  30 #include <DirectHW/DirectHW.h>
  31 #endif
  32 #ifdef __NetBSD__
  33 #include <pciutils/pci.h>
  34 #else
  35 #include <pci/pci.h>
  36 #endif
  37
  38 /* This #include is needed for freebsd_{rd,wr}msr. */
  39 #if defined(__FreeBSD__)
  40 #include <machine/cpufunc.h>
  41 #endif
  42
  43 #ifdef __NetBSD__
  44 static inline uint8_t inb(unsigned port)
  45 {
  46         uint8_t data;
  47         __asm volatile("inb %w1,%0" : "=a" (data) : "d" (port));
  48         return data;
  49 }
  50 static inline uint16_t inw(unsigned port)
  51 {
  52         uint16_t data;
  53         __asm volatile("inw %w1,%0": "=a" (data) : "d" (port));
  54         return data;
  55 }
  56 static inline uint32_t inl(unsigned port)
  57 {
  58         uint32_t data;
  59         __asm volatile("inl %w1,%0": "=a" (data) : "d" (port));
  60         return data;
  61 }
  62 #endif
  63
  64 #define INTELTOOL_VERSION "1.0"
  65
  66 /* Tested chipsets: */
  67 #define PCI_VENDOR_ID_INTEL                     0x8086
  68 #define PCI_DEVICE_ID_INTEL_ICH                 0x2410
  69 #define PCI_DEVICE_ID_INTEL_ICH0                0x2420
  70 #define PCI_DEVICE_ID_INTEL_ICH2                0x2440
  71 #define PCI_DEVICE_ID_INTEL_ICH4                0x24c0
  72 #define PCI_DEVICE_ID_INTEL_ICH4M               0x24cc
  73 #define PCI_DEVICE_ID_INTEL_ICH5                0x24d0
  74 #define PCI_DEVICE_ID_INTEL_ICH6                0x2640
  75 #define PCI_DEVICE_ID_INTEL_ICH7DH              0x27b0
  76 #define PCI_DEVICE_ID_INTEL_ICH7                0x27b8
  77 #define PCI_DEVICE_ID_INTEL_ICH7M               0x27b9
  78 #define PCI_DEVICE_ID_INTEL_ICH7MDH             0x27bd
  79 #define PCI_DEVICE_ID_INTEL_NM10                0x27bc
  80 #define PCI_DEVICE_ID_INTEL_ICH8                0x2810
  81 #define PCI_DEVICE_ID_INTEL_ICH8M               0x2815
  82 #define PCI_DEVICE_ID_INTEL_ICH8ME              0x2811
  83 #define PCI_DEVICE_ID_INTEL_ICH9DH              0x2912
  84 #define PCI_DEVICE_ID_INTEL_ICH9DO              0x2914
  85 #define PCI_DEVICE_ID_INTEL_ICH9R               0x2916
  86 #define PCI_DEVICE_ID_INTEL_ICH9                0x2918
  87 #define PCI_DEVICE_ID_INTEL_ICH9M               0x2919
  88 #define PCI_DEVICE_ID_INTEL_ICH9ME              0x2917
  89 #define PCI_DEVICE_ID_INTEL_ICH10R              0x3a16
  90 #define PCI_DEVICE_ID_INTEL_ICH10               0x3a18
  91 #define PCI_DEVICE_ID_INTEL_3400_DESKTOP        0x3b00
  92 #define PCI_DEVICE_ID_INTEL_3400_MOBILE         0x3b01
  93 #define PCI_DEVICE_ID_INTEL_P55                 0x3b02
  94 #define PCI_DEVICE_ID_INTEL_PM55                0x3b03
  95 #define PCI_DEVICE_ID_INTEL_H55                 0x3b06
  96 #define PCI_DEVICE_ID_INTEL_QM57                0x3b07
  97 #define PCI_DEVICE_ID_INTEL_H57                 0x3b08
  98 #define PCI_DEVICE_ID_INTEL_HM55                0x3b09
  99 #define PCI_DEVICE_ID_INTEL_Q57                 0x3b0a
 100 #define PCI_DEVICE_ID_INTEL_HM57                0x3b0b
 101 #define PCI_DEVICE_ID_INTEL_3400_MOBILE_SFF     0x3b0d
 102 #define PCI_DEVICE_ID_INTEL_B55_A               0x3b0e
 103 #define PCI_DEVICE_ID_INTEL_QS57                0x3b0f
 104 #define PCI_DEVICE_ID_INTEL_3400                0x3b12
 105 #define PCI_DEVICE_ID_INTEL_3420                0x3b14
 106 #define PCI_DEVICE_ID_INTEL_3450                0x3b16
 107 #define PCI_DEVICE_ID_INTEL_B55_B               0x3b1e
 108 #define PCI_DEVICE_ID_INTEL_SCH_POULSBO_LPC     0x8119
 109 #define PCI_DEVICE_ID_INTEL_Z68                 0x1c44
 110 #define PCI_DEVICE_ID_INTEL_P67                 0x1c46
 111 #define PCI_DEVICE_ID_INTEL_UM67                0x1c47
 112 #define PCI_DEVICE_ID_INTEL_HM65                0x1c49
 113 #define PCI_DEVICE_ID_INTEL_H67                 0x1c4a
 114 #define PCI_DEVICE_ID_INTEL_HM67                0x1c4b
 115 #define PCI_DEVICE_ID_INTEL_Q65                 0x1c4c
 116 #define PCI_DEVICE_ID_INTEL_QS67                0x1c4d
 117 #define PCI_DEVICE_ID_INTEL_Q67                 0x1c4e
 118 #define PCI_DEVICE_ID_INTEL_QM67                0x1c4f
 119 #define PCI_DEVICE_ID_INTEL_B65                 0x1c50
 120 #define PCI_DEVICE_ID_INTEL_C202                0x1c52
 121 #define PCI_DEVICE_ID_INTEL_C204                0x1c54
 122 #define PCI_DEVICE_ID_INTEL_C206                0x1c56
 123 #define PCI_DEVICE_ID_INTEL_H61                 0x1c5c
 124 #define PCI_DEVICE_ID_INTEL_Z77                 0x1e44
 125 #define PCI_DEVICE_ID_INTEL_Z75                 0x1e46
 126 #define PCI_DEVICE_ID_INTEL_Q77                 0x1e47
 127 #define PCI_DEVICE_ID_INTEL_Q75                 0x1e48
 128 #define PCI_DEVICE_ID_INTEL_B75                 0x1e49
 129 #define PCI_DEVICE_ID_INTEL_H77                 0x1e4a
 130 #define PCI_DEVICE_ID_INTEL_C216                0x1e53
 131 #define PCI_DEVICE_ID_INTEL_QM77                0x1e55
 132 #define PCI_DEVICE_ID_INTEL_QS77                0x1e56
 133 #define PCI_DEVICE_ID_INTEL_HM77                0x1e57
 134 #define PCI_DEVICE_ID_INTEL_UM77                0x1e58
 135 #define PCI_DEVICE_ID_INTEL_HM76                0x1e59
 136 #define PCI_DEVICE_ID_INTEL_HM75                0x1e5d
 137 #define PCI_DEVICE_ID_INTEL_HM70                0x1e5e
 138 #define PCI_DEVICE_ID_INTEL_NM70                0x1e5f
 139 #define PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_FULL   0x9c41
 140 #define PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_PREM   0x9c43
 141 #define PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_BASE   0x9c45
 142 #define PCI_DEVICE_ID_INTEL_WILDCATPOINT_LP_PREM        0x9cc3
 143 #define PCI_DEVICE_ID_INTEL_WILDCATPOINT_LP             0x9cc5
 144 #define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_SATA           0xa102
 145 #define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_P2SB           0xa120
 146 #define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_PRE            0xa141
 147 #define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_SATA        0x9d03
 148 #define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_PRE         0x9d41
 149 #define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_BASE_SKL  0x9d43
 150 #define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_Y_PREM_SKL  0x9d46
 151 #define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_PREM_SKL  0x9d48
 152 #define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_BASE_KBL  0x9d53
 153 #define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_Y_PREM_KBL  0x9d56
 154 #define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_PREM_KBL  0x9d58
 155 #define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_IHDCP_BASE        0x9d50
 156 #define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_IHDCP_PREM        0x9d4e
 157 #define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_Y_IHDCP_PREM        0x9d4b
 158 #define PCI_DEVICE_ID_INTEL_H110                0xa143
 159 #define PCI_DEVICE_ID_INTEL_H170                0xa144
 160 #define PCI_DEVICE_ID_INTEL_Z170                0xa145
 161 #define PCI_DEVICE_ID_INTEL_Q170                0xa146
 162 #define PCI_DEVICE_ID_INTEL_Q150                0xa147
 163 #define PCI_DEVICE_ID_INTEL_B150                0xa148
 164 #define PCI_DEVICE_ID_INTEL_C236                0xa149
 165 #define PCI_DEVICE_ID_INTEL_C232                0xa14a
 166 #define PCI_DEVICE_ID_INTEL_QM170               0xa14d
 167 #define PCI_DEVICE_ID_INTEL_HM170               0xa14e
 168 #define PCI_DEVICE_ID_INTEL_CM236               0xa150
 169 #define PCI_DEVICE_ID_INTEL_HM175               0xa152
 170 #define PCI_DEVICE_ID_INTEL_QM175               0xa153
 171 #define PCI_DEVICE_ID_INTEL_CM238               0xa154
 172
 173 #define PCI_DEVICE_ID_INTEL_C621                0xa1c1
 174 #define PCI_DEVICE_ID_INTEL_C622                0xa1c2
 175 #define PCI_DEVICE_ID_INTEL_C624                0xa1c3
 176 #define PCI_DEVICE_ID_INTEL_C625                0xa1c4
 177 #define PCI_DEVICE_ID_INTEL_C626                0xa1c5
 178 #define PCI_DEVICE_ID_INTEL_C627                0xa1c6
 179 #define PCI_DEVICE_ID_INTEL_C628                0xa1c7
 180 #define PCI_DEVICE_ID_INTEL_C629                0xa1ca
 181 #define PCI_DEVICE_ID_INTEL_C624_SUPER          0xa242
 182 #define PCI_DEVICE_ID_INTEL_C627_SUPER_1        0xa243
 183 #define PCI_DEVICE_ID_INTEL_C621_SUPER          0xa244
 184 #define PCI_DEVICE_ID_INTEL_C627_SUPER_2        0xa245
 185 #define PCI_DEVICE_ID_INTEL_C628_SUPER          0xa246
 186
 187 #define PCI_DEVICE_ID_INTEL_H310                0xa303
 188 #define PCI_DEVICE_ID_INTEL_H370                0xa304
 189 #define PCI_DEVICE_ID_INTEL_Z390                0xa305
 190 #define PCI_DEVICE_ID_INTEL_Q370                0xa306
 191 #define PCI_DEVICE_ID_INTEL_B360                0xa308
 192 #define PCI_DEVICE_ID_INTEL_C246                0xa309
 193 #define PCI_DEVICE_ID_INTEL_C242                0xa30a
 194 #define PCI_DEVICE_ID_INTEL_QM370               0xa30c
 195 #define PCI_DEVICE_ID_INTEL_HM370               0xa30d
 196 #define PCI_DEVICE_ID_INTEL_CM246               0xa30e
 197
 198 #define PCI_DEVICE_ID_INTEL_82810               0x7120
 199 #define PCI_DEVICE_ID_INTEL_82810_DC    0x7122
 200 #define PCI_DEVICE_ID_INTEL_82810E_DC   0x7124
 201 #define PCI_DEVICE_ID_INTEL_82830M              0x3575
 202 #define PCI_DEVICE_ID_INTEL_82845               0x1a30
 203 #define PCI_DEVICE_ID_INTEL_82865               0x2570
 204 #define PCI_DEVICE_ID_INTEL_82915               0x2580
 205 #define PCI_DEVICE_ID_INTEL_82945P              0x2770
 206 #define PCI_DEVICE_ID_INTEL_82945GM             0x27a0
 207 #define PCI_DEVICE_ID_INTEL_82945GSE    0x27ac
 208 #define PCI_DEVICE_ID_INTEL_82946               0x2970
 209 #define PCI_DEVICE_ID_INTEL_82965PM             0x2a00
 210 #define PCI_DEVICE_ID_INTEL_82Q965              0x2990
 211 #define PCI_DEVICE_ID_INTEL_82975X              0x277c
 212 #define PCI_DEVICE_ID_INTEL_82Q35               0x29b0
 213 #define PCI_DEVICE_ID_INTEL_82G33               0x29c0
 214 #define PCI_DEVICE_ID_INTEL_82Q33               0x29d0
 215 #define PCI_DEVICE_ID_INTEL_82X38               0x29e0
 216 #define PCI_DEVICE_ID_INTEL_32X0                0x29f0
 217 #define PCI_DEVICE_ID_INTEL_82XX4X              0x2a40
 218 #define PCI_DEVICE_ID_INTEL_82Q45               0x2e10
 219 #define PCI_DEVICE_ID_INTEL_82G45               0x2e20
 220 #define PCI_DEVICE_ID_INTEL_82G41               0x2e30
 221 #define PCI_DEVICE_ID_INTEL_82B43               0x2e40
 222 #define PCI_DEVICE_ID_INTEL_82B43_2             0x2e90
 223
 224 #define PCI_DEVICE_ID_INTEL_C8_MOBILE           0x8c41
 225 #define PCI_DEVICE_ID_INTEL_C8_DESKTOP          0x8c42
 226 #define PCI_DEVICE_ID_INTEL_Z87                 0x8c44
 227 #define PCI_DEVICE_ID_INTEL_Z85                 0x8c46
 228 #define PCI_DEVICE_ID_INTEL_HM86                0x8c49
 229 #define PCI_DEVICE_ID_INTEL_H87                 0x8c4a
 230 #define PCI_DEVICE_ID_INTEL_HM87                0x8c4b
 231 #define PCI_DEVICE_ID_INTEL_Q85                 0x8c4c
 232 #define PCI_DEVICE_ID_INTEL_Q87                 0x8c4e
 233 #define PCI_DEVICE_ID_INTEL_QM87                0x8c4f
 234 #define PCI_DEVICE_ID_INTEL_B85                 0x8c50
 235 #define PCI_DEVICE_ID_INTEL_C222                0x8c52
 236 #define PCI_DEVICE_ID_INTEL_C224                0x8c54
 237 #define PCI_DEVICE_ID_INTEL_C226                0x8c56
 238 #define PCI_DEVICE_ID_INTEL_H81                 0x8c5c
 239
 240 #define PCI_DEVICE_ID_INTEL_82X58               0x3405
 241 #define PCI_DEVICE_ID_INTEL_SCH_POULSBO 0x8100
 242 #define PCI_DEVICE_ID_INTEL_ATOM_DXXX   0xa000
 243 #define PCI_DEVICE_ID_INTEL_I63XX               0x2670
 244
 245 #define PCI_DEVICE_ID_INTEL_I5000X              0x25c0
 246 #define PCI_DEVICE_ID_INTEL_I5000Z              0x25d0
 247 #define PCI_DEVICE_ID_INTEL_I5000V              0x25d4
 248 #define PCI_DEVICE_ID_INTEL_I5000P              0x25d8
 249
 250 /* untested, but almost identical to D-series */
 251 #define PCI_DEVICE_ID_INTEL_ATOM_NXXX   0xa010
 252
 253 #define PCI_DEVICE_ID_INTEL_82443LX             0x7180
 254 /* 82443BX has a different device ID if AGP is disabled (hardware-wise). */
 255 #define PCI_DEVICE_ID_INTEL_82443BX             0x7190
 256 #define PCI_DEVICE_ID_INTEL_82443BX_NO_AGP      0x7192
 257
 258 /* 82371AB/EB/MB use the same device ID value. */
 259 #define PCI_DEVICE_ID_INTEL_82371XX             0x7110
 260
 261 /* Bay Trail */
 262 #define PCI_DEVICE_ID_INTEL_BAYTRAIL            0x0f00 /* SOC Transaction Router */
 263 #define PCI_DEVICE_ID_INTEL_BAYTRAIL_LPC        0x0f1c
 264 #define PCI_DEVICE_ID_INTEL_BAYTRAIL_GFX        0x0f31
 265 #define CPUID_BAYTRAIL                                          0x30670
 266
 267 #define PCI_DEVICE_ID_INTEL_APL_LPC             0x5ae8
 268 #define PCI_DEVICE_ID_INTEL_DNV_LPC             0x19dc
 269
 270 /* Intel starts counting these generations with the integration of the DRAM controller */
 271 #define PCI_DEVICE_ID_INTEL_CORE_0TH_GEN        0xd132 /* Nehalem */
 272 #define PCI_DEVICE_ID_INTEL_CORE_1ST_GEN        0x0044 /* Westmere */
 273 #define PCI_DEVICE_ID_INTEL_CORE_2ND_GEN_D      0x0100 /* Sandy Bridge (Desktop) */
 274 #define PCI_DEVICE_ID_INTEL_CORE_2ND_GEN_M      0x0104 /* Sandy Bridge (Mobile) */
 275 #define PCI_DEVICE_ID_INTEL_CORE_2ND_GEN_E3     0x0108 /* Sandy Bridge (Xeon E3) */
 276 #define PCI_DEVICE_ID_INTEL_CORE_3RD_GEN_D      0x0150 /* Ivy Bridge (Desktop) */
 277 #define PCI_DEVICE_ID_INTEL_CORE_3RD_GEN_M      0x0154 /* Ivy Bridge (Mobile) */
 278 #define PCI_DEVICE_ID_INTEL_CORE_3RD_GEN_E3     0x0158 /* Ivy Bridge (Xeon E3 v2) */
 279 #define PCI_DEVICE_ID_INTEL_CORE_3RD_GEN_015c   0x015c /* Ivy Bridge (?) */
 280 #define PCI_DEVICE_ID_INTEL_CORE_4TH_GEN_D      0x0c00 /* Haswell (Desktop) */
 281 #define PCI_DEVICE_ID_INTEL_CORE_4TH_GEN_M      0x0c04 /* Haswell (Mobile) */
 282 #define PCI_DEVICE_ID_INTEL_CORE_4TH_GEN_E3     0x0c08 /* Haswell (Xeon E3 v3) */
 283 #define PCI_DEVICE_ID_INTEL_CORE_4TH_GEN_U      0x0a04 /* Haswell-ULT */
 284 #define PCI_DEVICE_ID_INTEL_CORE_5TH_GEN_U      0x1604 /* Broadwell-ULT */
 285 #define PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_D2     0x190f /* Skylake (Desktop) */
 286 #define PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_M      0x1910 /* Skylake (Mobile) */
 287 #define PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_WST    0x1918 /* Skylake (Workstation) */
 288 #define PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_D      0x191f /* Skylake (Desktop) */
 289 #define PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_E      0x2020 /* Skylake-E (Server) */
 290 #define PCI_DEVICE_ID_INTEL_CORE_7TH_GEN_U      0x5904 /* Kabylake (Mobile) */
 291 #define PCI_DEVICE_ID_INTEL_CORE_7TH_GEN_Y      0x590C /* Kabylake (Mobile) */
 292 #define PCI_DEVICE_ID_INTEL_CORE_7TH_GEN_U_Q    0x5914 /* Kabylake (Mobile) */
 293 #define PCI_DEVICE_ID_INTEL_CORE_7TH_GEN_E3     0x5918 /* Kabylake Xeon E3 */
 294
 295
 296 /* Intel GPUs */
 297 #define PCI_DEVICE_ID_INTEL_G35_EXPRESS         0x2982
 298 #define PCI_DEVICE_ID_INTEL_G35_EXPRESS_1       0x2983
 299 #define PCI_DEVICE_ID_INTEL_965_EXPRESS         0x2a02
 300 #define PCI_DEVICE_ID_INTEL_965_EXPRESS_1       0x2a03
 301 #define PCI_DEVICE_ID_INTEL_965_EXPRESS_2       0x2a12
 302 #define PCI_DEVICE_ID_INTEL_965_EXPRESS_3       0x2a13
 303 #define PCI_DEVICE_ID_INTEL_4_SERIES            0x2a42
 304 #define PCI_DEVICE_ID_INTEL_4_SERIES_1          0x2a43
 305 #define PCI_DEVICE_ID_INTEL_G45                 0x2e22
 306 #define PCI_DEVICE_ID_INTEL_G45_1               0x2e23
 307 #define PCI_DEVICE_ID_INTEL_Q45                 0x2e12
 308 #define PCI_DEVICE_ID_INTEL_Q45_1               0x2e13
 309 #define PCI_DEVICE_ID_INTEL_G41                 0x2e32
 310 #define PCI_DEVICE_ID_INTEL_G41_1               0x2e33
 311 #define PCI_DEVICE_ID_INTEL_B43                 0x2e42
 312 #define PCI_DEVICE_ID_INTEL_B43_1               0x2e43
 313 #define PCI_DEVICE_ID_INTEL_B43_2               0x2e92
 314 #define PCI_DEVICE_ID_INTEL_B43_3               0x2e93
 315 #define PCI_DEVICE_ID_INTEL_HD_GRAPHICS         0x0046
 316 #define PCI_DEVICE_ID_INTEL_HD_GRAPHICS_1       0x0042
 317 #define PCI_DEVICE_ID_INTEL_HD_GRAPHICS_2       0x0106
 318 #define PCI_DEVICE_ID_INTEL_HD_2000             0x0102
 319 #define PCI_DEVICE_ID_INTEL_HD_2000_1           0x0106
 320 #define PCI_DEVICE_ID_INTEL_HD_3000             0x0116
 321 #define PCI_DEVICE_ID_INTEL_HD_3000_1           0x0112
 322 #define PCI_DEVICE_ID_INTEL_HD_3000_2           0x0116
 323 #define PCI_DEVICE_ID_INTEL_HD_3000_3           0x0122
 324 #define PCI_DEVICE_ID_INTEL_HD_3000_4           0x0126
 325 #define PCI_DEVICE_ID_INTEL_HD_3000_5           0x0116
 326 #define PCI_DEVICE_ID_INTEL_HD_2500             0x0152
 327 #define PCI_DEVICE_ID_INTEL_HD_2500_1           0x0156
 328 #define PCI_DEVICE_ID_INTEL_HD_2500_2           0x015A
 329 #define PCI_DEVICE_ID_INTEL_HD_4000             0x0162
 330 #define PCI_DEVICE_ID_INTEL_HD_4000_1           0x0166
 331 #define PCI_DEVICE_ID_INTEL_HD_4000_2           0x016A
 332 #define PCI_DEVICE_ID_INTEL_HD_4600             0x0412
 333 #define PCI_DEVICE_ID_INTEL_HD_4600_1           0x0416
 334 #define PCI_DEVICE_ID_INTEL_HD_4400             0x041E
 335 #define PCI_DEVICE_ID_INTEL_HD_5000             0x0422
 336 #define PCI_DEVICE_ID_INTEL_HD_5000_1           0x0426
 337 #define PCI_DEVICE_ID_INTEL_HD_5000_2           0x042A
 338 #define PCI_DEVICE_ID_INTEL_HD_510              0x1902
 339 #define PCI_DEVICE_ID_INTEL_HD_515              0x191E
 340 #define PCI_DEVICE_ID_INTEL_HD_520              0x1916
 341 #define PCI_DEVICE_ID_INTEL_HD_530_1            0x191B
 342 #define PCI_DEVICE_ID_INTEL_HD_530_2            0x1912
 343 #define PCI_DEVICE_ID_INTEL_UHD_615_1           0x591C
 344 #define PCI_DEVICE_ID_INTEL_UHD_615_2           0x591E
 345 #define PCI_DEVICE_ID_INTEL_UHD_617             0x87C0
 346 #define PCI_DEVICE_ID_INTEL_UHD_620_1           0x5917
 347 #define PCI_DEVICE_ID_INTEL_UHD_620_2           0x3EA0
 348 #define PCI_DEVICE_ID_INTEL_UHD_620_3           0x5916
 349 #define PCI_DEVICE_ID_INTEL_UHD_630_1           0x3E92
 350 #define PCI_DEVICE_ID_INTEL_UHD_630_2           0x3E9B
 351 #define PCI_DEVICE_ID_INTEL_UHD_630_3           0x3E91
 352 #define PCI_DEVICE_ID_INTEL_UHD_630_4           0x5912
 353 #define PCI_DEVICE_ID_INTEL_UHD_630_5           0x591B
 354 #define PCI_DEVICE_ID_INTEL_UHD_630_6           0x5902
 355 #define PCI_DEVICE_ID_INTEL_UHD_630_7           0x3E98
 356 #define PCI_DEVICE_ID_INTEL_UHD_640             0x5926
 357 #define PCI_DEVICE_ID_INTEL_IRIS_540            0x1926
 358 #define PCI_DEVICE_ID_INTEL_IRIS_550            0x1927
 359 #define PCI_DEVICE_ID_INTEL_IRIS_PRO_580        0x193B
 360 #define PCI_DEVICE_ID_INTEL_IRIS_PLUS_650       0x5927
 361 #define PCI_DEVICE_ID_INTEL_IRIS_PLUS_655       0x3EA5
 362
 363 #if !defined(__DARWIN__) && !defined(__FreeBSD__)
 364 typedef struct { uint32_t hi, lo; } msr_t;
 365 #endif
 366 #if defined (__FreeBSD__)
 367 /* FreeBSD already has conflicting definitions for wrmsr/rdmsr. */
 368 #undef rdmsr
 369 #undef wrmsr
 370 #define rdmsr freebsd_rdmsr
 371 #define wrmsr freebsd_wrmsr
 372 typedef struct { uint32_t hi, lo; } msr_t;
 373 msr_t freebsd_rdmsr(int addr);
 374 int freebsd_wrmsr(int addr, msr_t msr);
 375 #endif
 376 typedef struct { uint16_t addr; int size; char *name; } io_register_t;
 377 typedef struct {
 378         uint32_t eax;
 379         uint32_t ebx;
 380         uint32_t ecx;
 381         uint32_t edx;
 382 } cpuid_result_t;
 383
 384 void *map_physical(uint64_t phys_addr, size_t len);
 385 void unmap_physical(void *virt_addr, size_t len);
 386
 387 unsigned int cpuid(unsigned int op);
 388 int print_intel_core_msrs(void);
 389 int print_mchbar(struct pci_dev *nb, struct pci_access *pacc, const char *dump_spd_file);
 390 int print_pmbase(struct pci_dev *sb, struct pci_access *pacc);
 391 int print_rcba(struct pci_dev *sb);
 392 int print_gpios(struct pci_dev *sb, int show_all, int show_diffs);
 393 void print_gpio_groups(struct pci_dev *sb);
 394 int print_epbar(struct pci_dev *nb);
 395 int print_dmibar(struct pci_dev *nb);
 396 int print_pciexbar(struct pci_dev *nb);
 397 int print_ambs(struct pci_dev *nb, struct pci_access *pacc);
 398 int print_spi(struct pci_dev *sb);
 399 int print_gfx(struct pci_dev *gfx);
 400 int print_ahci(struct pci_dev *ahci);
 401 int print_sgx(void);
 402 void ivybridge_dump_timings(const char *dump_spd_file);
 403
 404 #endif