?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
mb/google/brya/var/taniks: Modify DPTF setting for taniks
[coreboot.git] / src / mainboard / google / brya / variants / taniks / overridetree.cb
blobfe37f68af8fe82a9165d386e659bdbb4460e4ae0
1 fw_config
2 field DB_USB 0 1
3 option DB_USB_ABSENT 0
4 option DB_USB3_WITH_A 1
5 end
6 field DB_SD 2 3
7 option DB_SD_ABSENT 0
8 option DB_SD_OZ711LV2LN 1
9 option DB_SD_GL9750 2
10 option DB_SD_RTS5232S 3
11 end
12 field KB_BL 4
13 option KB_BL_ABSENT 0
14 option KB_BL_PRESENT 1
15 end
16 field AUDIO 5 7
17 option AUDIO_UNKNOWN 0
18 option AUDIO_MAX98357_ALC5682I_I2S_2WAY 1
19 end
20 field KB_LAYOUT 8 9
21 option KB_LAYOUT_DEFAULT 0
22 end
23 field WIFI_SAR_ID 10 11
24 option WIFI_SAR_ID_0 0
25 option WIFI_SAR_ID_1 1
26 option WIFI_SAR_ID_2 2
27 option WIFI_SAR_ID_3 3
28 end
29 field BOOT_NVME_MASK 12
30 option BOOT_NVME_DISABLED 0
31 option BOOT_NVME_ENABLED 1
32 end
33 field BOOT_EMMC_MASK 13
34 option BOOT_EMMC_DISABLED 0
35 option BOOT_EMMC_ENABLED 1
36 end
37 end
38 chip soc/intel/alderlake
39 # Acoustic settings
40 register "acoustic_noise_mitigation" = "1"
41 register "slow_slew_rate[VR_DOMAIN_IA]" = "SLEW_FAST_8"
42 register "slow_slew_rate[VR_DOMAIN_GT]" = "SLEW_FAST_8"
43 register "fast_pkg_c_ramp_disable[VR_DOMAIN_IA]" = "1"
44 register "fast_pkg_c_ramp_disable[VR_DOMAIN_GT]" = "1"
45 register "PreWake" = "100"
46 register "ext_fivr_settings" = "{
47 .configure_ext_fivr = 1,
48 .v1p05_enable_bitmap = FIVR_ENABLE_ALL_SX,
49 .vnn_enable_bitmap = FIVR_ENABLE_ALL_SX,
50 .v1p05_supported_voltage_bitmap = FIVR_VOLTAGE_NORMAL |
51 FIVR_VOLTAGE_MIN_ACTIVE |
52 FIVR_VOLTAGE_MIN_RETENTION,
53 .vnn_supported_voltage_bitmap = FIVR_VOLTAGE_NORMAL |
54 FIVR_VOLTAGE_MIN_ACTIVE |
55 FIVR_VOLTAGE_MIN_RETENTION,
56 .v1p05_icc_max_ma = 500,
57 .vnn_sx_voltage_mv = 1250,
58 }"
59 register "tcss_aux_ori" = "1"
60 register "typec_aux_bias_pads[0]" = "{.pad_auxp_dc = GPP_E22, .pad_auxn_dc = GPP_E23}"
61 register "sagv" = "SaGv_Enabled"
62
63 register "platform_pmax" = "145"
64
65 register "usb2_ports[1]" = "USB2_PORT_EMPTY" # Disable Port 1
66 register "usb2_ports[2]" = "USB2_PORT_TYPE_C(OC2)" # DB USB2_C1
67 register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" #DB Type-A Port A1
68 register "usb2_ports[3]" = "USB2_PORT_EMPTY" # Disable M.2 WWAN
69
70 register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC4)" # USB3/2 Type A port A1
71 register "usb3_ports[3]" = "USB3_PORT_EMPTY" # Disable M.2 WWAN
72
73 # Intel Common SoC Config
74 #+-------------------+---------------------------+
75 #| Field | Value |
76 #+-------------------+---------------------------+
77 #| I2C0 | Audio |
78 #| I2C1 | cr50 TPM. Early init is |
79 #| | required to set up a BAR |
80 #| | for TPM communication |
81 #| I2C3 | Touchscreen |
82 #| I2C5 | Trackpad |
83 #+-------------------+---------------------------+
84 register "common_soc_config" = "{
85 .i2c[0] = {
86 .speed = I2C_SPEED_FAST,
87 },
88 .i2c[1] = {
89 .early_init = 1,
90 .speed = I2C_SPEED_FAST,
91 .rise_time_ns = 600,
92 .fall_time_ns = 400,
93 .data_hold_time_ns = 50,
94 },
95 .i2c[3] = {
96 .early_init = 1,
97 .speed = I2C_SPEED_FAST,
98 },
99 .i2c[5] = {
100 .speed = I2C_SPEED_FAST,
101 },
102 }"
103 # I2C Port Config
104 register "serial_io_i2c_mode" = "{
105 [PchSerialIoIndexI2C0] = PchSerialIoPci,
106 [PchSerialIoIndexI2C1] = PchSerialIoPci,
107 [PchSerialIoIndexI2C2] = PchSerialIoDisabled,
108 [PchSerialIoIndexI2C3] = PchSerialIoPci,
109 [PchSerialIoIndexI2C4] = PchSerialIoDisabled,
110 [PchSerialIoIndexI2C5] = PchSerialIoPci,
111 }"
112 device domain 0 on
113 device ref dtt on
114 chip drivers/intel/dptf
115 ## sensor information
116 register "options.tsr[0].desc" = ""DRAM_SOC""
117 register "options.tsr[1].desc" = ""Ambient""
118 register "options.tsr[2].desc" = ""Charger""
119 register "options.tsr[3].desc" = ""WWAN""
120
121 # TODO: below values are initial reference values only
122 ## Active Policy
123 register "policies.active" = "{
124 [0] = {
125 .target = DPTF_CPU,
126 .thresholds = {
127 TEMP_PCT(60, 68),
128 TEMP_PCT(56, 50),
129 TEMP_PCT(52, 50),
130 TEMP_PCT(46, 40),
131 TEMP_PCT(42, 40),
132 }
133 },
134 [1] = {
135 .target = DPTF_TEMP_SENSOR_1,
136 .thresholds = {
137 TEMP_PCT(60, 68),
138 TEMP_PCT(56, 50),
139 TEMP_PCT(52, 50),
140 TEMP_PCT(46, 40),
141 TEMP_PCT(42, 40),
142 }
143 },
144 [2] = {
145 .target = DPTF_TEMP_SENSOR_2,
146 .thresholds = {
147 TEMP_PCT(60, 68),
148 TEMP_PCT(56, 50),
149 TEMP_PCT(52, 50),
150 TEMP_PCT(46, 40),
151 TEMP_PCT(42, 40),
152 }
153 },
154 [3] = {
155 .target = DPTF_TEMP_SENSOR_3,
156 .thresholds = {
157 TEMP_PCT(60, 69),
158 TEMP_PCT(56, 50),
159 TEMP_PCT(52, 50),
160 TEMP_PCT(46, 40),
161 TEMP_PCT(42, 40),
162 }
163 }
164 }"
165
166 ## Passive Policy
167 register "policies.passive" = "{
168 [0] = DPTF_PASSIVE(CPU, CPU, 95, 5000),
169 [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 90, 6000),
170 [2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 90, 6000),
171 [3] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_2, 90, 6000),
172 [4] = DPTF_PASSIVE(CPU, TEMP_SENSOR_3, 90, 6000),
173 }"
174
175 ## Critical Policy
176 register "policies.critical" = "{
177 [0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN),
178 [1] = DPTF_CRITICAL(TEMP_SENSOR_0, 100, SHUTDOWN),
179 [2] = DPTF_CRITICAL(TEMP_SENSOR_1, 100, SHUTDOWN),
180 [3] = DPTF_CRITICAL(TEMP_SENSOR_2, 100, SHUTDOWN),
181 [4] = DPTF_CRITICAL(TEMP_SENSOR_3, 100, SHUTDOWN),
182 }"
183
184 register "controls.power_limits" = "{
185 .pl1 = {
186 .min_power = 3000,
187 .max_power = 15000,
188 .time_window_min = 28 * MSECS_PER_SEC,
189 .time_window_max = 32 * MSECS_PER_SEC,
190 .granularity = 200,
191 },
192 .pl2 = {
193 .min_power = 55000,
194 .max_power = 55000,
195 .time_window_min = 28 * MSECS_PER_SEC,
196 .time_window_max = 32 * MSECS_PER_SEC,
197 .granularity = 1000,
198 }
199 }"
200
201 ## Charger Performance Control (Control, mA)
202 register "controls.charger_perf" = "{
203 [0] = { 255, 1700 },
204 [1] = { 24, 1500 },
205 [2] = { 16, 1000 },
206 [3] = { 8, 500 }
207 }"
208
209 ## Fan Performance Control (Percent, Speed, Noise, Power)
210 register "controls.fan_perf" = "{
211 [0] = { 100, 6000, 220, 2200, },
212 [1] = { 92, 5500, 180, 1800, },
213 [2] = { 78, 4500, 145, 1450, },
214 [3] = { 68, 3900, 115, 1150, },
215 [4] = { 60, 3600, 90, 900, },
216 [5] = { 50, 3200, 55, 550, },
217 [6] = { 40, 2800, 30, 300, },
218 [7] = { 33, 2500, 15, 150, },
219 [8] = { 12, 800, 10, 100, },
220 [9] = { 0, 0, 0, 50, }
221 }"
222
223 ## Fan options
224 register "options.fan.fine_grained_control" = "1"
225 register "options.fan.step_size" = "2"
226
227 device generic 0 alias dptf_policy on end
228 end
229 end
230 device ref pcie4_0 on
231 # Enable CPU PCIE RP 1 using CLK 0
232 register "cpu_pcie_rp[CPU_RP(1)]" = "{
233 .clk_req = 0,
234 .clk_src = 0,
235 .flags = PCIE_RP_LTR | PCIE_RP_AER,
236 }"
237 probe BOOT_NVME_MASK BOOT_NVME_ENABLED
238 end
239 device ref tbt_pcie_rp0 off end
240 device ref tbt_pcie_rp1 off end
241 device ref tbt_pcie_rp2 off end
242 device ref i2c0 on
243 chip drivers/i2c/generic
244 register "hid" = ""10EC5682""
245 register "name" = ""RT58""
246 register "desc" = ""Headset Codec""
247 register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_A23)"
248 # Set the jd_src to RT5668_JD1 for jack detection
249 register "property_count" = "1"
250 register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER"
251 register "property_list[0].name" = ""realtek,jd-src""
252 register "property_list[0].integer" = "1"
253 device i2c 1a on
254 probe AUDIO AUDIO_MAX98357_ALC5682I_I2S_2WAY
255 end
256 end
257 end
258 device ref i2c1 on
259 chip drivers/i2c/tpm
260 register "hid" = ""GOOG0005""
261 register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_A13_IRQ)"
262 device i2c 50 on end
263 end
264 end
265 device ref i2c3 on
266 chip drivers/i2c/hid
267 register "generic.hid" = ""GDIX0000""
268 register "generic.desc" = ""Goodix Touchscreen""
269 register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)"
270 register "generic.probed" = "1"
271 register "generic.reset_gpio" =
272 "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C1)"
273 # Parameter T5 >= 180ms
274 register "generic.reset_delay_ms" = "180"
275 # Parameter T2 >= 1ms
276 register "generic.reset_off_delay_ms" = "3"
277 register "generic.enable_gpio" =
278 "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
279 # Parameter T1 >= 20ms
280 register "generic.enable_delay_ms" = "20"
281 register "generic.stop_gpio" =
282 "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_E3)"
283 # Parameter T4 >= 1ms
284 register "generic.stop_off_delay_ms" = "1"
285 register "generic.has_power_resource" = "1"
286 register "hid_desc_reg_offset" = "0x01"
287 device i2c 5d on end
288 end
289 chip drivers/i2c/generic
290 register "hid" = ""ELAN0001""
291 register "desc" = ""ELAN Touchscreen""
292 register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)"
293 register "probed" = "1"
294 register "reset_gpio" =
295 "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C1)"
296 register "reset_delay_ms" = "20"
297 register "enable_gpio" =
298 "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
299 register "enable_delay_ms" = "1"
300 register "has_power_resource" = "1"
301 device i2c 10 on end
302 end
303 end
304 device ref i2c5 on
305 chip drivers/i2c/generic
306 register "hid" = ""ELAN0000""
307 register "desc" = ""ELAN Touchpad""
308 register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F14_IRQ)"
309 register "wake" = "GPE0_DW2_14"
310 register "probed" = "1"
311 device i2c 15 on end
312 end
313 chip drivers/i2c/hid
314 register "generic.hid" = ""PNP0C50""
315 register "generic.desc" = ""Synaptics Touchpad""
316 register "generic.irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F14_IRQ)"
317 register "generic.wake" = "GPE0_DW2_14"
318 register "generic.probed" = "1"
319 register "hid_desc_reg_offset" = "0x20"
320 device i2c 2c on end
321 end
322 end
323 device ref hda on
324 chip drivers/generic/max98357a
325 register "hid" = ""MX98357A""
326 register "sdmode_gpio" =
327 "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A11)"
328 register "sdmode_delay" = "5"
329 device generic 0 on
330 probe AUDIO AUDIO_MAX98357_ALC5682I_I2S_2WAY
331 end
332 end
333 end
334 device ref pcie_rp5 on
335 chip soc/intel/common/block/pcie/rtd3
336 register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_B11)"
337 register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_H20)"
338 register "srcclk_pin" = "2"
339 device generic 0 on end
340 end
341 register "pch_pcie_rp[PCH_RP(5)]" = "{
342 .clk_src = 2,
343 .clk_req = 2,
344 .flags = PCIE_RP_LTR | PCIE_RP_AER,
345 }"
346 end
347 device ref pcie_rp6 off end
348 device ref pcie_rp8 on
349 chip soc/intel/common/block/pcie/rtd3
350 register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_H13)"
351 register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D18)"
352 register "srcclk_pin" = "3"
353 device generic 0 on
354 probe DB_SD DB_SD_OZ711LV2LN
355 probe DB_SD DB_SD_GL9750
356 probe DB_SD DB_SD_RTS5232S
357 end
358 end
359 end
360 device ref pcie_rp9 on
361 # Enable NVMe PCIE 9 using clk 0
362 register "pch_pcie_rp[PCH_RP(9)]" = "{
363 .clk_src = 0,
364 .clk_req = 0,
365 .flags = PCIE_RP_LTR | PCIE_RP_AER,
366 }"
367 chip soc/intel/common/block/pcie/rtd3
368 register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D11)"
369 register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_B4)"
370 register "srcclk_pin" = "0"
371 register "ext_pm_support" = "ACPI_PCIE_RP_EMIT_ALL"
372 device generic 0 on
373 probe BOOT_EMMC_MASK BOOT_EMMC_ENABLED
374 end
375 end
376 probe BOOT_EMMC_MASK BOOT_EMMC_ENABLED
377 end
378 device ref pch_espi on
379 chip ec/google/chromeec
380 use conn0 as mux_conn[0]
381 use conn1 as mux_conn[1]
382 device pnp 0c09.0 on end
383 end
384 end
385 device ref pmc hidden
386 chip drivers/intel/pmc_mux
387 device generic 0 on
388 chip drivers/intel/pmc_mux/conn
389 use usb2_port1 as usb2_port
390 use tcss_usb3_port1 as usb3_port
391 device generic 0 alias conn0 on end
392 end
393 chip drivers/intel/pmc_mux/conn
394 use usb2_port3 as usb2_port
395 use tcss_usb3_port3 as usb3_port
396 device generic 2 alias conn1 on end
397 end
398 end
399 end
400 end
401 device ref tcss_xhci on
402 chip drivers/usb/acpi
403 device ref tcss_root_hub on
404 chip drivers/usb/acpi
405 register "desc" = ""USB3 Type-C Port C0 (MLB)""
406 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
407 register "use_custom_pld" = "true"
408 register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
409 device ref tcss_usb3_port1 on end
410 end
411 chip drivers/usb/acpi
412 register "desc" = ""USB3 Type-C Port C1 (DB)""
413 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
414 register "use_custom_pld" = "true"
415 register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(2, 1))"
416 device ref tcss_usb3_port3 on
417 probe DB_USB DB_USB3_WITH_A
418 end
419 end
420 end
421 end
422 end
423 device ref xhci on
424 chip drivers/usb/acpi
425 device ref xhci_root_hub on
426 chip drivers/usb/acpi
427 register "desc" = ""USB2 Type-C Port C0 (MLB)""
428 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
429 register "use_custom_pld" = "true"
430 register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
431 device ref usb2_port1 on end
432 end
433 chip drivers/usb/acpi
434 register "desc" = ""USB2 Type-C Port C1 (DB)""
435 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
436 register "use_custom_pld" = "true"
437 register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(2, 1))"
438 device ref usb2_port3 on
439 probe DB_USB DB_USB3_WITH_A
440 end
441 end
442 chip drivers/usb/acpi
443 register "desc" = ""USB2 Camera""
444 register "type" = "UPC_TYPE_INTERNAL"
445 device ref usb2_port6 on
446 end
447 end
448 chip drivers/usb/acpi
449 register "desc" = ""USB2 Type-A Port (DB)""
450 register "type" = "UPC_TYPE_A"
451 register "use_custom_pld" = "true"
452 register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, LEFT, ACPI_PLD_GROUP(3, 1))"
453 device ref usb2_port7 on
454 probe DB_USB DB_USB3_WITH_A
455 end
456 end
457 chip drivers/usb/acpi
458 register "desc" = ""USB2 Type-A Port (MLB)""
459 register "type" = "UPC_TYPE_A"
460 register "use_custom_pld" = "true"
461 register "custom_pld" = "ACPI_PLD_TYPE_A(LEFT, RIGHT, ACPI_PLD_GROUP(4, 1))"
462 device ref usb2_port9 on end
463 end
464 chip drivers/usb/acpi
465 register "desc" = ""USB2 Bluetooth""
466 register "type" = "UPC_TYPE_INTERNAL"
467 register "reset_gpio" =
468 "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D4)"
469 device ref usb2_port10 on end
470 end
471 chip drivers/usb/acpi
472 register "desc" = ""USB3 Type-A Port (MLB)""
473 register "type" = "UPC_TYPE_USB3_A"
474 register "use_custom_pld" = "true"
475 register "custom_pld" = "ACPI_PLD_TYPE_A(LEFT, RIGHT, ACPI_PLD_GROUP(4, 1))"
476 device ref usb3_port1 on end
477 end
478 chip drivers/usb/acpi
479 register "desc" = ""USB3 Type-A Port (DB)""
480 register "type" = "UPC_TYPE_USB3_A"
481 register "use_custom_pld" = "true"
482 register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, LEFT, ACPI_PLD_GROUP(3, 1))"
483 device ref usb3_port3 on
484 probe DB_USB DB_USB3_WITH_A
485 end
486 end
487 end
488 end
489 end
490 end
491 end
ast, secure and flexible OpenSource firmware