2 ## This file is part of the coreboot project.
5 ## SPDX-License-Identifier: GPL-2.0-only
7 ifeq ($(CONFIG_HAVE_INTEL_FIRMWARE),y)
9 # Run intermediate steps when producing coreboot.rom
10 # that adds additional components to the final firmware
11 # image outside of CBFS
13 ifeq ($(CONFIG_HAVE_IFD_BIN),y)
14 INTERMEDIATE+=add_intel_firmware
15 else ifeq ($(CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED),y)
16 files_added:: warn_intel_firmware
19 IFD_BIN_PATH := $(CONFIG_IFD_BIN_PATH)
20 ifneq ($(call strip_quotes,$(CONFIG_IFD_CHIPSET)),)
21 IFDTOOL_USE_CHIPSET := -p $(CONFIG_IFD_CHIPSET)
24 add_intel_firmware: $(call strip_quotes,$(CONFIG_IFD_BIN_PATH))
25 ifeq ($(CONFIG_HAVE_ME_BIN),y)
26 add_intel_firmware: $(call strip_quotes,$(CONFIG_ME_BIN_PATH))
28 ifeq ($(CONFIG_HAVE_GBE_BIN),y)
29 add_intel_firmware: $(call strip_quotes,$(CONFIG_GBE_BIN_PATH))
31 ifeq ($(CONFIG_HAVE_EC_BIN),y)
32 add_intel_firmware: $(call strip_quotes,$(CONFIG_EC_BIN_PATH))
34 add_intel_firmware: $(obj)/coreboot.pre $(IFDTOOL)
35 printf " DD Adding Intel Firmware Descriptor\n"
36 dd if=$(IFD_BIN_PATH) \
37 of=$(obj)/coreboot.pre conv=notrunc >/dev/null 2>&1
38 ifeq ($(CONFIG_VALIDATE_INTEL_DESCRIPTOR),y)
39 $(objutil)/ifdtool/ifdtool \
40 $(IFDTOOL_USE_CHIPSET) \
41 -t $(obj)/coreboot.pre
43 ifeq ($(CONFIG_HAVE_ME_BIN),y)
44 printf " IFDTOOL me.bin -> coreboot.pre\n"
45 $(objutil)/ifdtool/ifdtool \
46 $(IFDTOOL_USE_CHIPSET) \
47 -i ME:$(CONFIG_ME_BIN_PATH) \
48 -O $(obj)/coreboot.pre \
51 ifeq ($(CONFIG_CHECK_ME),y)
52 util/me_cleaner/me_cleaner.py -c $(obj)/coreboot.pre > /dev/null
54 ifeq ($(CONFIG_USE_ME_CLEANER),y)
55 printf " ME_CLEANER coreboot.pre\n"
56 util/me_cleaner/me_cleaner.py $(obj)/coreboot.pre \
57 $(patsubst "%,%,$(patsubst %",%,$(CONFIG_ME_CLEANER_ARGS))) > \
60 ifeq ($(CONFIG_HAVE_GBE_BIN),y)
61 printf " IFDTOOL gbe.bin -> coreboot.pre\n"
62 $(objutil)/ifdtool/ifdtool \
63 $(IFDTOOL_USE_CHIPSET) \
64 -i GbE:$(CONFIG_GBE_BIN_PATH) \
65 -O $(obj)/coreboot.pre \
68 ifeq ($(CONFIG_HAVE_EC_BIN),y)
69 printf " IFDTOOL ec.bin -> coreboot.pre\n"
70 $(objutil)/ifdtool/ifdtool \
71 $(IFDTOOL_USE_CHIPSET) \
72 -i EC:$(CONFIG_EC_BIN_PATH) \
73 -O $(obj)/coreboot.pre \
77 ifeq ($(CONFIG_LOCK_MANAGEMENT_ENGINE),y)
78 printf " IFDTOOL Locking Management Engine\n"
79 $(objutil)/ifdtool/ifdtool \
80 $(IFDTOOL_USE_CHIPSET) -l \
81 -O $(obj)/coreboot.pre \
84 ifeq ($(CONFIG_UNLOCK_FLASH_REGIONS),y)
85 printf " IFDTOOL Unlocking Management Engine\n"
86 $(objutil)/ifdtool/ifdtool \
87 $(IFDTOOL_USE_CHIPSET) -u \
88 -O $(obj)/coreboot.pre \
92 ifeq ($(CONFIG_EM100),y)
93 printf " IFDTOOL Setting EM100 mode\n"
94 $(objutil)/ifdtool/ifdtool \
95 $(IFDTOOL_USE_CHIPSET) --em100 \
96 -O $(obj)/coreboot.pre \
101 printf "\n\t** WARNING **\n"
102 printf "coreboot has been built without an Intel Firmware Descriptor.\n"
103 printf "Never write a complete coreboot.rom without an IFD to your\n"
104 printf "board's flash chip! You can use flashrom's IFD or layout\n"
105 printf "parameters to flash only to the BIOS region.\n\n"
107 PHONY+=add_intel_firmware warn_intel_firmware