src/: Replace GPL boilerplate with SPDX headers
[coreboot.git] / src / southbridge / amd / cimx / sb800 / Makefile.inc
blobf74d7ce60559a810441dab7bf8af8ea0ce678c50
2 # This file is part of the coreboot project.
5 # SPDX-License-Identifier: GPL-2.0-only
7 # SB800 Platform Files
9 bootblock-y += bootblock.c
11 romstage-y += cfg.c
12 romstage-y += early.c
13 romstage-y += smbus.c smbus_spd.c
15 ramstage-y += cfg.c
16 ramstage-y += late.c
18 all-y += reset.c
20 ramstage-$(CONFIG_SB800_MANUAL_FAN_CONTROL) += fan.c
21 ramstage-$(CONFIG_SB800_IMC_FAN_CONTROL) += fan.c
22 ramstage-$(CONFIG_SPI_FLASH) += spi.c
23 ramstage-$(CONFIG_HAVE_ACPI_TABLES) += fadt.c
25 postcar-y += ramtop.c
26 romstage-y += ramtop.c
27 ramstage-y += ramtop.c
29 bootblock-$(CONFIG_USBDEBUG) += ../../sb800/enable_usbdebug.c
30 romstage-$(CONFIG_USBDEBUG) += ../../sb800/enable_usbdebug.c
31 ramstage-$(CONFIG_USBDEBUG) += ../../sb800/enable_usbdebug.c
33 ramstage-y   += smbus.c
34 ramstage-y   += lpc.c
36 ifeq ($(CONFIG_SB800_SATA_AHCI), y)
37 ifdef CONFIG_SB800_AHCI_ROM
38         stripped_ahci_rom_id = $(call strip_quotes,$(CONFIG_AHCI_ROM_ID))
39         cbfs-files-y += pci$(stripped_ahci_rom_id).rom
40         pci$(stripped_ahci_rom_id).rom-file := $(call strip_quotes,$(CONFIG_AHCI_ROM_FILE))
41         pci$(stripped_ahci_rom_id).rom-type := optionrom
42 endif
43 endif
45 ifeq ($(CONFIG_SB800_SATA_RAID), y)
46         stripped_raid_rom_id = $(call strip_quotes,$(CONFIG_RAID_ROM_ID))
47         cbfs-files-y += pci$(stripped_raid_rom_id).rom
48         pci$(stripped_raid_rom_id).rom-file := $(call strip_quotes,$(CONFIG_RAID_ROM_FILE))
49         pci$(stripped_raid_rom_id).rom-type := optionrom
51         cbfs-files-y += raid/misc.bin
52         raid/misc.bin-file := $(call strip_quotes,$(CONFIG_RAID_MISC_ROM_FILE))
53         raid/misc.bin-position := $(CONFIG_RAID_MISC_ROM_POSITION)
54         raid/misc.bin-type := raw
55 endif
57 ifeq ($(CONFIG_SB800_IMC_FWM), y)
59 # ROMSIG At ROMBASE + 0x20000:
60 # +-----------+---------------+----------------+------------+
61 # |0x55AA55AA |EC ROM Address |GEC ROM Address |            |
62 # +-----------+---------------+----------------+------------+
63 # EC ROM should be 64K aligned.
64 SB800_FWM_POSITION=$(shell printf %u $(CONFIG_SB800_FWM_POSITION))
65 #assume the cbfs header is less than 128 bytes.
66 ROMSIG_SIZE=16
68 SB800_IMC_POSITION=$(call int-align,$(call add-int,$(SB800_FWM_POSITION) $(ROMSIG_SIZE) 128),65536)
70 $(obj)/coreboot_SB800_romsig.bin: \
71                         $(call strip_quotes, $(CONFIG_SB800_IMC_FWM_FILE)) \
72                         $(obj)/config.h \
73                         $(obj)/mainboard/$(MAINBOARDDIR)/static.c
74         echo "    SB800 FW  $@"
75         for fwm in 1437226410 \
76                 $(SB800_IMC_POSITION) \
77                 0 \
78                 0 ; do \
79                 echo  $$fwm | LC_ALL=C awk '{printf ("%c%c%c%c", $$1 % 256, int($$1/256) % 256, int($$1/65536) % 256, int($$1/16777216));}'; \
80         done > $@
82 cbfs-files-y += SB800/fwm
83 SB800/fwm-file := $(obj)/coreboot_SB800_romsig.bin
84 SB800/fwm-position := $(SB800_FWM_POSITION)
85 SB800/fwm-type := raw
87 cbfs-files-y += SB800/imc
88 SB800/imc-file := $(call strip_quotes, $(CONFIG_SB800_IMC_FWM_FILE))
89 SB800/imc-position := $(SB800_IMC_POSITION)
90 SB800/imc-type := raw
92 endif