2 ## This file is part of the coreboot project.
5 ## SPDX-License-Identifier: GPL-2.0-only
7 ifeq ($(CONFIG_SOC_ROCKCHIP_RK3288),y)
9 IDBTOOL = util/rockchip/make_idb.py
11 bootblock-y += bootblock.c
12 bootblock-y += ../common/uart.c
13 bootblock-y += timer.c
14 bootblock-y += clock.c
15 bootblock-y += ../common/spi.c
16 bootblock-y += ../common/gpio.c
18 bootblock-y += ../common/i2c.c
19 bootblock-$(CONFIG_SOFTWARE_I2C) += software_i2c.c
20 bootblock-y += ../common/rk808.c
22 verstage-y += ../common/spi.c
24 verstage-y += ../common/uart.c
25 verstage-y += ../common/gpio.c
28 verstage-y += crypto.c
29 verstage-y += ../common/i2c.c
30 verstage-$(CONFIG_SOFTWARE_I2C) += software_i2c.c
32 romstage-y += ../common/cbmem.c
34 romstage-y += ../common/uart.c
35 romstage-y += ../common/i2c.c
36 romstage-$(CONFIG_SOFTWARE_I2C) += software_i2c.c
38 romstage-y += ../common/gpio.c
40 romstage-y += ../common/spi.c
42 romstage-y += ../common/rk808.c
43 romstage-y += ../common/pwm.c
45 romstage-y += ../common/i2c.c
49 ramstage-y += ../common/i2c.c
50 ramstage-$(CONFIG_SOFTWARE_I2C) += software_i2c.c
52 ramstage-y += ../common/spi.c
54 ramstage-y += ../common/gpio.c
56 ramstage-y += ../common/rk808.c
57 ramstage-y += ../common/pwm.c
58 ramstage-y += ../common/vop.c
59 ramstage-y += ../common/edp.c
61 ramstage-y += display.c
62 ramstage-y += ../common/uart.c
64 CPPFLAGS_common += -Isrc/soc/rockchip/rk3288/include
65 CPPFLAGS_common += -Isrc/soc/rockchip/common/include
67 $(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin
68 @printf "Generating: $(subst $(obj)/,,$(@))\n"
70 @$(IDBTOOL) --from=$< --to=$@ --enable-align --chip=RK32