src/northbridge/intel/pineview/Makefile.inc

   1 #
   2 # This file is part of the coreboot project.
   3 #
   4 #
   5 # SPDX-License-Identifier: GPL-2.0-only
   6
   7 ifeq ($(CONFIG_NORTHBRIDGE_INTEL_PINEVIEW),y)
   8
   9 bootblock-y += ../../../cpu/x86/early_reset.S
  10 bootblock-y += bootblock.c
  11
  12 ramstage-y += memmap.c
  13 ramstage-y += northbridge.c
  14 ramstage-y += gma.c
  15 ramstage-y += acpi.c
  16
  17 romstage-y += romstage.c
  18 romstage-y += memmap.c
  19 romstage-y += raminit.c
  20 romstage-y += early_init.c
  21
  22 postcar-y += memmap.c
  23
  24 endif