2 ## This file is part of the coreboot project.
5 ## SPDX-License-Identifier: GPL-2.0-only
7 # -----------------------------------------------------------------
10 #start-bit length config config-ID name
12 #8 8 r 0 alarm_seconds
14 #24 8 r 0 alarm_minutes
18 #56 8 r 0 day_of_month
21 # -----------------------------------------------------------------
26 # -----------------------------------------------------------------
28 #88 1 r 0 auto_switch_DST
29 #89 1 r 0 24_hour_mode
30 #90 1 r 0 binary_values_enable
31 #91 1 r 0 square-wave_out_enable
32 #92 1 r 0 update_finished_enable
33 #93 1 r 0 alarm_interrupt_enable
34 #94 1 r 0 periodic_interrupt_enable
35 #95 1 r 0 disable_clock_updates
36 # -----------------------------------------------------------------
38 #96 4 r 0 status_c_rsvd
43 # -----------------------------------------------------------------
45 #104 7 r 0 status_d_rsvd
46 #111 1 r 0 valid_cmos_ram
47 # -----------------------------------------------------------------
48 # Diagnostic Status Register
51 # -----------------------------------------------------------------
52 0 120 r 0 reserved_memory
55 # -----------------------------------------------------------------
56 # RTC_BOOT_BYTE (coreboot hardcoded)
57 # reboot_counter reserved for core, not used by platform.
59 388 4 h 0 reboot_counter
62 # -----------------------------------------------------------------
63 # coreboot config options: console
68 # coreboot config options: cpu
72 # coreboot config options: southbridge
74 409 2 e 7 power_on_after_fail
77 # coreboot config options: bootloader
80 # coreboot config options: check sums
82 #1000 24 r 0 amd_reserved
84 # -----------------------------------------------------------------
107 # -----------------------------------------------------------------