2 # This file is part of the coreboot project.
5 # SPDX-License-Identifier: GPL-2.0-only
7 # -----------------------------------------------------------------
10 # -----------------------------------------------------------------
12 # -----------------------------------------------------------------
14 # -----------------------------------------------------------------
16 #96 4 r 0 status_c_rsvd
21 # -----------------------------------------------------------------
23 #104 7 r 0 status_d_rsvd
24 #111 1 r 0 valid_cmos_ram
25 # -----------------------------------------------------------------
26 # Diagnostic Status Register
29 # -----------------------------------------------------------------
30 0 120 r 0 reserved_memory
33 # -----------------------------------------------------------------
34 # RTC_BOOT_BYTE (coreboot hardcoded)
36 388 4 h 0 reboot_counter
39 # -----------------------------------------------------------------
40 # coreboot config options: console
45 #400 8 r 0 reserved for century byte
47 # coreboot config options: southbridge
49 #409 2 e 7 power_on_after_fail
51 # coreboot config options: northbridge
52 411 3 e 11 gfx_uma_size
54 # coreboot config options: bootloader
55 416 512 s 0 boot_devices
56 928 8 h 0 boot_default
57 936 1 e 8 cmos_defaults_loaded
61 # coreboot config options: cpu
64 # coreboot config options: ec
65 949 1 e 9 first_battery
72 956 1 e 1 power_management_beeps
73 959 1 e 1 low_battery_beep
75 968 8 h 0 tft_brightness
77 # coreboot config options: check sums
79 #1000 24 r 0 amd_reserved
81 # RAM initialization internal data
89 # -----------------------------------------------------------------
124 # -----------------------------------------------------------------