2 # This file is part of the coreboot project.
5 # SPDX-License-Identifier: GPL-2.0-only
7 # -----------------------------------------------------------------
10 # -----------------------------------------------------------------
12 # -----------------------------------------------------------------
14 # -----------------------------------------------------------------
16 #96 4 r 0 status_c_rsvd
21 # -----------------------------------------------------------------
23 #104 7 r 0 status_d_rsvd
24 #111 1 r 0 valid_cmos_ram
25 # -----------------------------------------------------------------
26 # Diagnostic Status Register
29 # -----------------------------------------------------------------
30 0 120 r 0 reserved_memory
33 # -----------------------------------------------------------------
34 # RTC_BOOT_BYTE (coreboot hardcoded)
36 388 4 h 0 reboot_counter
39 # -----------------------------------------------------------------
40 # coreboot config options: console
45 #400 8 r 0 reserved for century byte
47 # coreboot config options: southbridge
49 409 2 e 7 power_on_after_fail
51 # coreboot config options: EC
52 411 1 e 9 first_battery
58 424 1 e 1 fn_ctrl_swap
60 426 1 e 1 power_management_beeps
61 427 1 e 1 low_battery_beep
65 # coreboot config options: bootloader
66 432 512 s 0 boot_devices
67 944 8 h 0 boot_default
69 # coreboot config options: northbridge
70 952 2 e 12 hybrid_graphics_mode
71 954 4 e 11 gfx_uma_size
73 # coreboot config options: check sums
77 # RAM initialization internal data
78 1024 128 r 0 read_training_results
83 # -----------------------------------------------------------------
125 # -----------------------------------------------------------------