src/: Replace GPL boilerplate with SPDX headers
[coreboot.git] / src / mainboard / jetway / nf81-t56n-lf / Kconfig
blob3d9d11232157bdf1c4b40952f9114be2e5925ab9
2 # This file is part of the coreboot project.
5 # SPDX-License-Identifier: GPL-2.0-only
7 if BOARD_JETWAY_NF81_T56N_LF
9 config BOARD_SPECIFIC_OPTIONS
10         def_bool y
11         select CPU_AMD_AGESA_FAMILY14
12         select NORTHBRIDGE_AMD_AGESA_FAMILY14
13         select SOUTHBRIDGE_AMD_CIMX_SB800
14         select SUPERIO_FINTEK_F71869AD
15         select HAVE_OPTION_TABLE
16         select HAVE_PIRQ_TABLE
17         select HAVE_MP_TABLE
18         select HAVE_ACPI_RESUME
19         select HAVE_ACPI_TABLES
20         select BOARD_ROMSIZE_KB_2048
21         select GFXUMA
23 config MAINBOARD_DIR
24         string
25         default "jetway/nf81-t56n-lf"
27 config MAINBOARD_PART_NUMBER
28         string
29         default "NF81-T56N-LF"
31 config HW_MEM_HOLE_SIZEK
32         hex
33         default 0x200000
35 config MAX_CPUS
36         int
37         default 2
39 config IRQ_SLOT_COUNT
40         int
41         default 11
43 config ONBOARD_VGA_IS_PRIMARY
44         bool
45         default y
47 config VGA_BIOS
48         bool
49         default n
51 #config VGA_BIOS_FILE
52 #       string "VGA BIOS path and filename"
53 #       depends on VGA_BIOS
54 #       default "rom/video/OntarioGenericVbios.bin"
56 config VGA_BIOS_ID
57         string
58         default "1002,9806" # FUSION_G_T56N
60 config SB800_AHCI_ROM
61         bool
62         default n
64 endif # BOARD_JETWAY_NF81_T56N_LF