src/mainboard/intel/d945gclf/cmos.layout

   1 #
   2 # This file is part of the coreboot project.
   3 #
   4 #
   5 # SPDX-License-Identifier: GPL-2.0-only
   6
   7 # -----------------------------------------------------------------
   8 entries
   9
  10 # -----------------------------------------------------------------
  11 # Status Register A
  12 # -----------------------------------------------------------------
  13 # Status Register B
  14 # -----------------------------------------------------------------
  15 # Status Register C
  16 #96           4       r       0        status_c_rsvd
  17 #100          1       r       0        uf_flag
  18 #101          1       r       0        af_flag
  19 #102          1       r       0        pf_flag
  20 #103          1       r       0        irqf_flag
  21 # -----------------------------------------------------------------
  22 # Status Register D
  23 #104          7       r       0        status_d_rsvd
  24 #111          1       r       0        valid_cmos_ram
  25 # -----------------------------------------------------------------
  26 # Diagnostic Status Register
  27 #112          8       r       0        diag_rsvd1
  28
  29 # -----------------------------------------------------------------
  30 0          120       r       0        reserved_memory
  31 #120        264       r       0        unused
  32
  33 # -----------------------------------------------------------------
  34 # RTC_BOOT_BYTE (coreboot hardcoded)
  35 384          1       e       4        boot_option
  36 388          4       h       0        reboot_counter
  37 #390          2       r       0        unused?
  38
  39 # -----------------------------------------------------------------
  40 # coreboot config options: console
  41 #392          3       r       0        unused
  42 395          4       e       6        debug_level
  43 #399          1       r       0        unused
  44
  45 # coreboot config options: cpu
  46 #401          7       r       0        unused
  47
  48 # coreboot config options: southbridge
  49 408          1       e       1        nmi
  50 409          2       e       7        power_on_after_fail
  51
  52 # coreboot config options: northbridge
  53 411         3       e       11       gfx_uma_size
  54
  55 # coreboot config options: bootloader
  56 416        512       s       0        boot_devices
  57 #928         80       r       0        unused
  58
  59 # coreboot config options: check sums
  60 984         16       h       0        check_sum
  61 #1000        24       r       0        amd_reserved
  62
  63 # RAM initialization internal data
  64 1024         8       r       0        C0WL0REOST
  65 1032         8       r       0        C1WL0REOST
  66 1040         8       r       0        RCVENMT
  67 1048         4       r       0        C0DRT1
  68 1052         4       r       0        C1DRT1
  69
  70 # -----------------------------------------------------------------
  71
  72 enumerations
  73
  74 #ID value   text
  75 1     0     Disable
  76 1     1     Enable
  77 2     0     Enable
  78 2     1     Disable
  79 4     0     Fallback
  80 4     1     Normal
  81 6     0     Emergency
  82 6     1     Alert
  83 6     2     Critical
  84 6     3     Error
  85 6     4     Warning
  86 6     5     Notice
  87 6     6     Info
  88 6     7     Debug
  89 6     8     Spew
  90 7     0     Disable
  91 7     1     Enable
  92 7     2     Keep
  93 11    0     1M
  94 11    1     4M
  95 11    2     8M
  96 11    3     16M
  97 11    4     32M
  98 11    5     48M
  99 11    6     64M
 100
 101 # -----------------------------------------------------------------
 102 checksums
 103
 104 checksum 392 983 984