src/: Replace GPL boilerplate with SPDX headers
[coreboot.git] / src / mainboard / gigabyte / ga-g41m-es2l / cmos.layout
blob4887e76a8684fbcc95f287c61edeee36765f96f7
1 ##
2 ## This file is part of the coreboot project.
3 ##
4 ##
5 ## SPDX-License-Identifier: GPL-2.0-only
7 # -----------------------------------------------------------------
8 entries
10 # -----------------------------------------------------------------
11 # Status Register A
12 # -----------------------------------------------------------------
13 # Status Register B
14 # -----------------------------------------------------------------
15 # Status Register C
16 #96           4       r       0        status_c_rsvd
17 #100          1       r       0        uf_flag
18 #101          1       r       0        af_flag
19 #102          1       r       0        pf_flag
20 #103          1       r       0        irqf_flag
21 # -----------------------------------------------------------------
22 # Status Register D
23 #104          7       r       0        status_d_rsvd
24 #111          1       r       0        valid_cmos_ram
25 # -----------------------------------------------------------------
26 # Diagnostic Status Register
27 #112          8       r       0        diag_rsvd1
29 # -----------------------------------------------------------------
30 0          120       r       0        reserved_memory
31 #120        264       r       0        unused
33 # -----------------------------------------------------------------
34 # RTC_BOOT_BYTE (coreboot hardcoded)
35 384          1       e       4        boot_option
36 388          4       h       0        reboot_counter
37 #390          2       r       0        unused?
39 # -----------------------------------------------------------------
40 # coreboot config options: console
41 #392          3       r       0        unused
42 395          4       e       6        debug_level
43 #399          1       r       0        unused
45 # coreboot config options: southbridge
46 408          1       e       1        nmi
47 409          2       e       7        power_on_after_fail
49 # coreboot config options: cpu
50 #425        7       r       0        unused
52 # coreboot config options: northbridge
53 432         4        e      11        gfx_uma_size
54 #435        549       r       0        unused
57 # coreboot config options: check sums
58 984         16       h       0        check_sum
60 1024        144       r       0        recv_enable_results
61 # -----------------------------------------------------------------
63 enumerations
65 #ID value   text
66 1     0     Disable
67 1     1     Enable
68 2     0     Enable
69 2     1     Disable
70 4     0     Fallback
71 4     1     Normal
72 6     0     Emergency
73 6     1     Alert
74 6     2     Critical
75 6     3     Error
76 6     4     Warning
77 6     5     Notice
78 6     6     Info
79 6     7     Debug
80 6     8     Spew
81 7     0     Disable
82 7     1     Enable
83 7     2     Keep
84 11    1     4M
85 11    2     8M
86 11    3     16M
87 11    4     32M
88 11    5     48M
89 11    6     64M
90 11    7     128M
91 11    8     256M
92 11    9     96M
93 11    10     160M
94 11    11     224M
95 11    12     352M
97 # -----------------------------------------------------------------
98 checksums
100 checksum 392 983 984