2 ## This file is part of the coreboot project.
5 ## SPDX-License-Identifier: GPL-2.0-only
7 if BOARD_CAVIUM_CN8100_SFF_EVB
9 config BOARD_SPECIFIC_OPTIONS
11 select BOARD_ROMSIZE_KB_8192
12 select COMMON_CBFS_SPI_WRAPPER
14 select SOC_CAVIUM_CN81XX
16 select SPI_FLASH_STMICRO
17 select MISSING_BOARD_RESET
21 default "cavium/cn8100_sff_evb"
27 config BOOT_DEVICE_SPI_FLASH_BUS
31 config CONSOLE_SERIAL_UART_ADDRESS
33 depends on DRIVERS_UART
34 default 0x87E028000000
36 config UART_FOR_CONSOLE
38 depends on DRIVERS_UART
43 default "src/mainboard/$(CONFIG_MAINBOARD_DIR)/board.fmd"
48 ##########################################################
49 #### Update below when adding a new derivative board. ####
50 ##########################################################
52 config MAINBOARD_PART_NUMBER
54 default "CN8100_SFF_EVB"