1 #*****************************************************************************
3 # This file is part of the coreboot project.
6 # SPDX-License-Identifier: GPL-2.0-only
8 #*****************************************************************************
12 #start-bit length config config-ID name
14 #8 8 r 0 alarm_seconds
16 #24 8 r 0 alarm_minutes
20 #56 8 r 0 day_of_month
26 #88 1 r 0 auto_switch_DST
27 #89 1 r 0 24_hour_mode
28 #90 1 r 0 binary_values_enable
29 #91 1 r 0 square-wave_out_enable
30 #92 1 r 0 update_finished_enable
31 #93 1 r 0 alarm_interrupt_enable
32 #94 1 r 0 periodic_interrupt_enable
33 #95 1 r 0 disable_clock_updates
34 #96 288 r 0 temporary_filler
35 0 384 r 0 reserved_memory
38 388 4 h 0 reboot_counter
41 396 1 e 1 interleave_chip_selects
42 397 2 e 8 max_mem_clock
44 400 1 e 1 power_on_after_fail
50 432 8 h 0 boot_countdown
56 # Reserve the extended AMD configuration registers
57 1000 24 r 0 amd_reserved