src/: Replace GPL boilerplate with SPDX headers
[coreboot.git] / src / mainboard / biostar / am1ml / cmos.layout
blob0a4b4914781fb675038c1163412158b5470b1546
1 #*****************************************************************************
3 #  This file is part of the coreboot project.
6 # SPDX-License-Identifier: GPL-2.0-only
8 #*****************************************************************************
10 entries
12 #start-bit length  config config-ID    name
13 #0            8       r       0        seconds
14 #8            8       r       0        alarm_seconds
15 #16           8       r       0        minutes
16 #24           8       r       0        alarm_minutes
17 #32           8       r       0        hours
18 #40           8       r       0        alarm_hours
19 #48           8       r       0        day_of_week
20 #56           8       r       0        day_of_month
21 #64           8       r       0        month
22 #72           8       r       0        year
23 #80           4       r       0        rate_select
24 #84           3       r       0        REF_Clock
25 #87           1       r       0        UIP
26 #88           1       r       0        auto_switch_DST
27 #89           1       r       0        24_hour_mode
28 #90           1       r       0        binary_values_enable
29 #91           1       r       0        square-wave_out_enable
30 #92           1       r       0        update_finished_enable
31 #93           1       r       0        alarm_interrupt_enable
32 #94           1       r       0        periodic_interrupt_enable
33 #95           1       r       0        disable_clock_updates
34 #96         288       r       0        temporary_filler
35 0          384       r       0        reserved_memory
36 384          1       e       4        boot_option
37 386          1       e       1        ECC_memory
38 388          4       h       0        reboot_counter
39 #392          3       r       0        unused
40 395          1       e       1        hw_scrubber
41 396          1       e       1        interleave_chip_selects
42 397          2       e       8        max_mem_clock
43 399          1       e       2        multi_core
44 400          1       e       1        power_on_after_fail
45 412          4       e       6        debug_level
46 416          4       e       7        boot_first
47 420          4       e       7        boot_second
48 424          4       e       7        boot_third
49 428          4       h       0        boot_index
50 432          8       h       0        boot_countdown
51 440          4       e       9        slow_cpu
52 444          1       e       1        nmi
53 445          1       e       1        iommu
54 728        256       h       0        user_data
55 984         16       h       0        check_sum
56 # Reserve the extended AMD configuration registers
57 1000        24       r       0        amd_reserved
59 enumerations
61 #ID value   text
62 1     0     Disable
63 1     1     Enable
64 2     0     Enable
65 2     1     Disable
66 4     0     Fallback
67 4     1     Normal
68 6     5     Notice
69 6     6     Info
70 6     7     Debug
71 6     8     Spew
72 7     0     Network
73 7     1     HDD
74 7     2     Floppy
75 7     8     Fallback_Network
76 7     9     Fallback_HDD
77 7     10    Fallback_Floppy
78 #7     3     ROM
79 8     0     400Mhz
80 8     1     333Mhz
81 8     2     266Mhz
82 8     3     200Mhz
83 9     0     off
84 9     1     87.5%
85 9     2     75.0%
86 9     3     62.5%
87 9     4     50.0%
88 9     5     37.5%
89 9     6     25.0%
90 9     7     12.5%
92 checksums
94 checksum 392 983 984