1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /* This file is part of the coreboot project. */
5 #include <arch/ioapic.h>
7 unsigned long acpi_fill_madt(unsigned long current
)
9 /* create all subtables for processors */
10 current
= acpi_create_madt_lapics(current
);
12 /* Write SB800 IOAPIC, only one */
13 current
+= acpi_create_madt_ioapic((acpi_madt_ioapic_t
*) current
, CONFIG_MAX_CPUS
,
16 /* TODO: Remove the hardcode */
17 current
+= acpi_create_madt_ioapic((acpi_madt_ioapic_t
*) current
, CONFIG_MAX_CPUS
+1,
20 current
+= acpi_create_madt_irqoverride((acpi_madt_irqoverride_t
*)
22 current
+= acpi_create_madt_irqoverride((acpi_madt_irqoverride_t
*)
23 current
, 0, 9, 9, 0xF);
24 /* 0: mean bus 0--->ISA */
27 /* 5 mean: 0101 --> Edge-triggered, Active high */
29 /* create all subtables for processors */
30 current
+= acpi_create_madt_lapic_nmi((acpi_madt_lapic_nmi_t
*)current
, 0xff, 5, 1);
31 /* 1: LINT1 connect to NMI */