src/: Replace GPL boilerplate with SPDX headers
[coreboot.git] / src / mainboard / asus / p5gc-mx / devicetree.cb
blob6323df040626533f6a6148f4c5ee6b0e3954fbc6
1 ##
2 ## This file is part of the coreboot project.
3 ##
4 ##
5 ## SPDX-License-Identifier: GPL-2.0-only
7 chip northbridge/intel/i945
9 device cpu_cluster 0 on
10 chip cpu/intel/socket_LGA775
11 device lapic 0 on end
12 end
13 chip cpu/intel/model_1067x
14 device lapic 0xACAC off end
15 end
16 end
18 device domain 0 on
19 device pci 00.0 on # host bridge
20 subsystemid 0x1458 0x5000
21 end
22 device pci 01.0 on # i945 PCIe root port
23 subsystemid 0x1458 0x5000
24 ioapic_irq 2 INTA 0x10
25 end
26 device pci 02.0 on # vga controller
27 subsystemid 0x1458 0xd000
28 ioapic_irq 2 INTA 0x10
29 end
31 chip southbridge/intel/i82801gx
32 register "pirqa_routing" = "0x8b"
33 register "pirqb_routing" = "0x8a"
34 register "pirqc_routing" = "0x86"
35 register "pirqd_routing" = "0x85"
36 register "pirqe_routing" = "0x83"
37 register "pirqf_routing" = "0x80"
38 register "pirqg_routing" = "0x80"
39 register "pirqh_routing" = "0x85"
41 register "gpe0_en" = "0"
43 register "ide_enable_primary" = "0x1"
44 register "ide_enable_secondary" = "0x0"
46 register "p_cnt_throttling_supported" = "0"
48 # SuperIO Power Management Events
49 register "gen1_dec" = "0x00040291"
51 device pci 1b.0 on # High Definition Audio
52 ioapic_irq 2 INTA 0x10
53 end
54 device pci 1c.0 on end # PCIe
55 device pci 1c.1 on end # PCIe
56 device pci 1c.2 off end # PCIe port 3
57 device pci 1c.3 off end # PCIe port 4
58 device pci 1d.0 on # USB UHCI
59 ioapic_irq 2 INTA 0x10
60 end
61 device pci 1d.1 on # USB UHCI
62 ioapic_irq 2 INTB 0x11
63 end
64 device pci 1d.2 on # USB UHCI
65 ioapic_irq 2 INTC 0x12
66 end
67 device pci 1d.3 on # USB UHCI
68 ioapic_irq 2 INTD 0x13
69 end
70 device pci 1d.7 on # USB2 EHCI
71 ioapic_irq 2 INTA 0x10
72 end
73 device pci 1e.0 on end # PCI bridge
74 device pci 1e.2 off end # AC'97 Audio
75 device pci 1e.3 off end # AC'97 Modem
77 device pci 1f.0 on # LPC bridge
78 ioapic_irq 2 INTA 0x10
79 chip superio/winbond/w83627dhg
80 device pnp 2e.0 on # Floppy
81 io 0x60 = 0x3f0
82 irq 0x70 = 6
83 drq 0x74 = 2
84 end
85 device pnp 2e.1 on # Parallel port
86 io 0x60 = 0x378
87 irq 0x70 = 7
88 drq 0x74 = 3
89 end
90 device pnp 2e.2 on # COM1
91 io 0x60 = 0x3f8
92 irq 0x70 = 4
93 end
94 device pnp 2e.3 on # COM2
95 io 0x60 = 0x2f8
96 irq 0x70 = 3
97 end
98 device pnp 2e.5 on # Keyboard
99 io 0x60 = 0x60
100 io 0x62 = 0x64
101 irq 0x70 = 1 # Keyboard
102 irq 0x72 = 12 # Mouse
104 device pnp 2e.6 off end # SPI
105 device pnp 2e.7 on end # GPIO6
106 device pnp 2e.8 off end # WDTO# & PLED
107 device pnp 2e.9 off end # GPIO2
108 device pnp 2e.109 on # GPIO3
109 irq 0xf0 = 0xf3 # BSEL straps to output
110 irq 0xf2 = 0x08 # INVERT GPIO33
112 device pnp 2e.209 on # GPIO4
113 irq 0xf5 = 0xf8
115 device pnp 2e.309 on # GPIO5
116 irq 0xe0 = 0xde
118 device pnp 2e.a on # ACPI
119 irq 0x70 = 0
120 irq 0xe4 = 0x10 # VSBGATE# to power dram during S3
122 device pnp 2e.b on # HWM
123 io 0x60 = 0x290
124 irq 0x70 = 0
126 device pnp 2e.c on end # PECI, SST
129 device pci 1f.1 on # IDE
130 ioapic_irq 2 INTB 0x11
132 device pci 1f.2 on # SATA
133 ioapic_irq 2 INTC 0x12
135 device pci 1f.3 on # SMBus
136 ioapic_irq 2 INTD 0x13