2 # This file is part of the coreboot project.
5 # SPDX
-License
-Identifier
: GPL
-2.0-only
7 chip northbridge
/amd
/agesa
/family14
/root_complex
8 device cpu_cluster
0 on
9 chip cpu
/amd
/agesa
/family14
14 subsystemid
0x1022 0x1510 inherit
15 chip northbridge
/amd
/agesa
/family14
16 device pci
0.0 on
end # Root Complex
17 device pci
1.0 on
end # Internal Graphics P2P bridge
0x9804
18 device pci
1.1 on
end # Internal HDMI Audio
19 device pci
4.0 on
end # PCIE P2P bridge
0x9604
20 device pci
5.0 on
end # PCIE P2P bridge
0x9605
21 device pci
6.0 on
end # PCIE P2P bridge
0x9606
22 device pci
7.0 on
end # PCIE P2P bridge
0x9607
23 device pci
8.0 on
end # NB
/SB Link P2P bridge
24 end # agesa northbridge
26 chip southbridge
/amd
/cimx
/sb800
27 device pci
11.0 on
end # SATA
28 device pci
12.0 on
end # USB
29 device pci
12.1 on
end # USB
30 device pci
12.2 on
end # USB
31 device pci
13.0 on
end # USB
32 device pci
13.1 on
end # USB
33 device pci
13.2 on
end # USB
34 device pci
14.0 on
end # SM
35 device pci
14.1 on
end # IDE
0x439c
36 device pci
14.2 on
end # HDA
0x4383
37 device pci
14.3 on
end # LPC
0x439d
38 device pci
14.4 off
end # PCIB
0x4384, NOTE
: PCI interface pins shared with GPIO
{GPIO
35:0}
39 device pci
14.5 on
end # USB
2
40 device pci
15.0 off
end # PCIe PortA
41 device pci
15.1 off
end # PCIe PortB
42 device pci
15.2 off
end # PCIe PortC
43 device pci
15.3 off
end # PCIe PortD
44 device pci
16.0 off
end # OHCI USB3
45 device pci
16.2 off
end # EHCI USB3
46 register
"gpp_configuration" = "0" #
4:0:0:0 (really need
to disable all
4 somehow
)
47 register
"boot_switch_sata_ide" = "0" #
0: boot from SATA.
1: IDE
48 end #southbridge
/amd
/cimx
/sb800
50 chip northbridge
/amd
/agesa
/family14
52 # These seem unnecessary
53 device pci
18.0 on
end
54 device pci
18.1 on
end
55 device pci
18.2 on
end
56 device pci
18.3 on
end
57 device pci
18.4 on
end
58 device pci
18.5 on
end
60 register
"spdAddrLookup" = "
62 { {0xA0, 0xA2}, {0x00, 0x00}, }, // socket 0 - Channel 0 & 1 - 8-bit SPD addresses
63 { {0x00, 0x00}, {0x00, 0x00}, }, // socket 1 - Channel 0 & 1 - 8-bit SPD addresses
66 end # agesa northbridge
69 end #northbridge
/amd
/agesa
/family14
/root_complex